Thread (8 messages) 8 messages, 3 authors, 2021-08-16

Re: [PATCH v7 08/10] arm64: dts: HiSilicon: Add support for HiKey 970 PCIe controller hardware

From: Rob Herring <robh@kernel.org>
Date: 2021-08-16 18:27:05
Also in: linux-devicetree, linux-pci, lkml

On Wed, Jul 21, 2021 at 3:39 AM Mauro Carvalho Chehab
[off-list ref] wrote:
quoted hunk ↗ jump to hunk
From: Manivannan Sadhasivam <redacted>

Add DTS bindings for the HiKey 970 board's PCIe hardware.

Co-developed-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Manivannan Sadhasivam <redacted>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hi3670.dtsi     | 71 +++++++++++++++++++
 .../boot/dts/hisilicon/hikey970-pmic.dtsi     |  1 -
 drivers/pci/controller/dwc/pcie-kirin.c       | 12 ----
 3 files changed, 71 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
index 1f228612192c..6dfcfcfeedae 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
@@ -177,6 +177,12 @@ sctrl: sctrl@fff0a000 {
                        #clock-cells = <1>;
                };

+               pmctrl: pmctrl@fff31000 {
+                       compatible = "hisilicon,hi3670-pmctrl", "syscon";
+                       reg = <0x0 0xfff31000 0x0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
                iomcu: iomcu@ffd7e000 {
                        compatible = "hisilicon,hi3670-iomcu", "syscon";
                        reg = <0x0 0xffd7e000 0x0 0x1000>;
@@ -660,6 +666,71 @@ gpio28: gpio@fff1d000 {
                        clock-names = "apb_pclk";
                };

+               its_pcie: interrupt-controller@f4000000 {
+                       compatible = "arm,gic-v3-its";
+                       msi-controller;
+                       reg = <0x0 0xf5100000 0x0 0x100000>;
How does this h/w have a GIC-400 (which is GICv2) and then a GIC v3 ITS?
+               };
+
+               pcie_phy: pcie-phy@fc000000 {
+                       compatible = "hisilicon,hi970-pcie-phy";
+                       reg = <0x0 0xfc000000 0x0 0x80000>;
+
+                       phy-supply = <&ldo33>;
+
+                       clocks = <&crg_ctrl HI3670_CLK_GATE_PCIEPHY_REF>,
+                                <&crg_ctrl HI3670_CLK_GATE_PCIEAUX>,
+                                <&crg_ctrl HI3670_PCLK_GATE_PCIE_PHY>,
+                                <&crg_ctrl HI3670_PCLK_GATE_PCIE_SYS>,
+                                <&crg_ctrl HI3670_ACLK_GATE_PCIE>;
+                       clock-names = "phy_ref", "aux",
+                                     "apb_phy", "apb_sys",
+                                     "aclk";
+
+                       reset-gpios = <&gpio7 0 0 >, <&gpio25 2 0 >,
+                                     <&gpio3 1 0 >, <&gpio27 4 0 >;
+
+                       clkreq-gpios = <&gpio20 6 0 >, <&gpio27 3 0 >,
+                                      <&gpio17 0 0 >;
+
+                       /* vboost iboost pre post main */
+                       hisilicon,eye-diagram-param = <0xFFFFFFFF 0xFFFFFFFF
+                                                      0xFFFFFFFF 0xFFFFFFFF
+                                                      0xFFFFFFFF>;
+
+                       #phy-cells = <0>;
+               };
+
+               pcie@f4000000 {
+                       compatible = "hisilicon,kirin970-pcie";
+                       reg = <0x0 0xf4000000 0x0 0x1000000>,
+                             <0x0 0xfc180000 0x0 0x1000>,
+                             <0x0 0xf5000000 0x0 0x2000>;
+                       reg-names = "dbi", "apb", "config";
+                       bus-range = <0x0  0x1>;
+                       msi-parent = <&its_pcie>;
This means the PCI host doesn't have a MSI controller...
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       phys = <&pcie_phy>;
+                       ranges = <0x02000000 0x0 0x00000000
+                                 0x0 0xf6000000
+                                 0x0 0x02000000>;
+                       num-lanes = <1>;
+                       #interrupt-cells = <1>;
+                       interrupts = <0 283 4>;
+                       interrupt-names = "msi";
But then this says it does...

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