On Wed, Aug 11, 2021 at 3:08 PM Linus Walleij [off-list ref] wrote:
On Thu, Aug 5, 2021 at 7:42 PM Piyush Mehta [off-list ref] wrote:
quoted
Add Xilinx ZynqMP firmware MMIO APIs support to set and get PS_MODE
pins value and status. These APIs create an interface path between
mode pin controller driver and low-level API to access GPIO pins.
Signed-off-by: Piyush Mehta <redacted>
---
Changes in v2:
- Added Xilinx ZynqMP firmware MMIO API support to set and get pin
value and status.
I doubt this is "GPIO".
General Purpose? I think not. It seems to be about boot mode.
Agreed.
If you need a userspace ABI, then add sysfs files to this firmware
driver instead of bridging it to the GPIO subsystem.
I don't really want custom user interfaces in firmware drivers either.
What is the high-level description of the 'PS_MODE' here? Is
this perhaps something we already have a user interface for?
Arnd
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