Re: [PATCH 0/3] CM4 ACPI PCIe quirk
From: Stefan Wahren <hidden>
Date: 2021-08-06 11:40:31
Also in:
linux-acpi, linux-pci, lkml
From: Stefan Wahren <hidden>
Date: 2021-08-06 11:40:31
Also in:
linux-acpi, linux-pci, lkml
Hi Jeremy, Am 05.08.21 um 23:11 schrieb Jeremy Linton:
The PFTF CM4 is an ACPI platform that is following the PCIe SMCCC standard because its PCIe config space isn't ECAM compliant and is split into two parts. One part for the root port registers and a moveable window which points at a given device's 4K config space. Thus it doesn't have a MCFG (and really any MCFG provided would be nonsense anyway). As linux doesn't support the PCIe SMCCC standard we key off a linux specific host bridge _DSD to add custom ECAM ops and cfgres. The cfg op selects between those two regions, as well as disallowing problematic accesses, particularly if the link is down because there isn't an attached device.
i just want to inform you, that i recently submitted the inital patch series for DT support regarding CM4 [1]. I left out anything related to PCIe (including downstream changes to pcie-brcmstb). Best regards Stefan [1] - https://marc.info/?l=linux-arm-kernel&m=162782110325813&w=2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel