RE: [EXT] Re: The problem about arm64: io: Relax implicit barriers in default I/O accessors

-----Original Message-----
From: Frank Li
Sent: Thursday, July 15, 2021 10:54 AM
To: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>; Zhi Li <redacted>;
Shenwei Wang [off-list ref]; Han Xu [off-list ref]; Nitin Garg
[off-list ref]; Jason Liu [off-list ref]; linux-arm-
kernel@lists.infradead.org
Subject: RE: [EXT] Re: The problem about arm64: io: Relax implicit barriers
in default I/O accessors

quoted

-----Original Message-----
From: Will Deacon <will@kernel.org>
Sent: Tuesday, July 6, 2021 12:11 PM
To: Frank Li <frank.li@nxp.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>; Zhi Li <redacted>;
Shenwei Wang [off-list ref]; Han Xu [off-list ref]; Nitin Garg
[off-list ref]; Jason Liu [off-list ref]; linux-arm-
kernel@lists.infradead.org
Subject: Re: [EXT] Re: The problem about arm64: io: Relax implicit

barriers

quoted

in default I/O accessors

Caution: EXT Email

Hi Frank,

On Wed, Jun 23, 2021 at 03:48:10PM +0000, Frank Li wrote:

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I think you had a support case open with Arm [1] which I'm not able

to

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access -- please can you ask them about the two examples above?

Still not get feedback from ARM.

Just wondering if you were able to solve this without the need to change
Linux?

Sorry for late reply

For CCI-500 and 550, ARM removed support for barrier transactions but CCI-
400 supports barrier transactions. With CCI-400 it is a valid configuration
to have SYSBARDISABLE LOW in Cortex-A processors. This change in Linux
kernel is assuming that the SYSBARDISABLE is set to HIGH hence its not
correct change for all products having various versions of ARM CCI IP.

Frank Li

Deacon:

      Did you plan fix this problem by changing dma_wmb()?

Frank Li

quoted

Cheers,

Will

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