Re: [PATCH v2] arm64: avoid double ISB on kernel entry
From: Will Deacon <will@kernel.org>
Date: 2021-07-14 10:25:40
On Tue, Jul 13, 2021 at 06:41:13PM -0700, Peter Collingbourne wrote:
Although an ISB is required in order to make the MTE-related system
register update to GCR_EL1 effective, and the same is true for
PAC-related updates to SCTLR_EL1 or APIAKey{Hi,Lo}_EL1, we issue two
ISBs on machines that support both features while we only need to
issue one. To avoid the unnecessary additional ISB, remove the ISBs
from the PAC and MTE-specific alternative blocks and add a couple
of additional blocks that cause us to only execute one ISB if both
features are supported.
Signed-off-by: Peter Collingbourne <redacted>
Link: https://linux-review.googlesource.com/id/Idee7e8114d5ae5a0b171d06220a0eb4bb015a51c
---
v2:
- fix formatting
arch/arm64/kernel/entry.S | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)Thanks for the quick respin: Acked-by: Will Deacon <will@kernel.org> Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel