Re: [PATCH v10 10/10] arm64: dts: rockchip: Enable SFC for Odroid Go Advance
From: Chris Morgan <hidden>
Date: 2021-07-06 16:05:16
Also in:
linux-rockchip
On Wed, Jun 30, 2021 at 09:48:14PM +0800, Jon Lin wrote:
quoted hunk ↗ jump to hunk
From: Chris Morgan <redacted> This enables the Rockchip Serial Flash Controller for the Odroid Go Advance. Note that while the attached SPI NOR flash and the controller both support quad read mode, only 2 of the required 4 pins are present. The rx and tx bus width is set to 2 for this reason. Signed-off-by: Chris Morgan <redacted> Signed-off-by: Jon Lin <redacted> --- Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: None .../boot/dts/rockchip/rk3326-odroid-go2.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts index 49c97f76df77..f78e11dd8447 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts@@ -484,6 +484,22 @@ status = "okay"; }; +&sfc { + pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <108000000>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <2>;
Confirmed on the latest patch I still need to set the spi-tx-bus-width to 1 otherwise I receive the following errors: This is when I do the test case of reading 4MB of random data from /dev/urandom, then writing it to the last 4MB of the SPI flash, then reading it back and comparing the md5sum to see if the data is different. I usually get the errors below on the writing stage if the spi-tx-bus-width is 2, but if it is 1 things progress as expected and the hashes match (which I consider a passing test case). Given you have tested this same controller/SPI-NOR combination I'm assuming this is a board errata of some kind. Can we change the spi-tx-bus-width to 1 for this reason? [ 145.863221] mtdblock: erase of region [0xe28000, 0x1000] on "spi2.0" failed [ 145.871080] blk_update_request: I/O error, dev mtdblock0, sector 29000 op 0x1:(WRITE) flags 0x4800 phys_seg 5 prio class 0 [ 145.883529] Buffer I/O error on dev mtdblock0, logical block 3625, lost async page write Sorry I haven't responded to messages lately, I was out of town on vacation the last 2 weeks. I'll check the U-boot driver next.
+ };
+};
+
&tsadc {
status = "okay";
};
--
2.17.1
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