Re: Aw: Re: [PATCH] soc: mediatek: mmsys: fix HDMI output on mt7623/bananapi-r2
From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Date: 2021-07-26 00:28:17
Also in:
dri-devel, linux-mediatek, lkml
From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Date: 2021-07-26 00:28:17
Also in:
dri-devel, linux-mediatek, lkml
Hi, Frank: Frank Wunderlich [off-list ref] 於 2021年7月25日 週日 上午1:06寫道:
quoted
On 12.07.21 19:16, Frank Wunderlich wrote:quoted
Hi, it turns out that problem is the read+or of the new value i reverted my patch and changed reg = readl_relaxed(mmsys->regs + routes[i].addr) | routes[i].val; writel_relaxed(reg, mmsys->regs + routes[i].addr); to writel_relaxed(routes[i].val, mmsys->regs + routes[i].addr); and it works too, but maybe it breaks other platformsA gentle ping. Amy further comments which of both ways is the right one (restoring old output select function or write only without read+or)?
As I've discussed in [1], SOUT has many bits and need to be cleared before set new value. Of course, write only could do the clear, but for MOUT, it clear the bits that should not be cleared. If you want to use the table, you need to implement the 'mask'. [1] https://patchwork.kernel.org/project/linux-mediatek/patch/trinity-937ebfa3-d123-42de-a289-3ad0dbc09782-1625830110576@3c-app-gmx-bap43/ Regards, Chun-Kuang.
regards Frank
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