Subject: RE: [PATCH V2 0/4] mailbox: imx: add i.MX8ULP MU support
quoted
Subject: [PATCH V2 0/4] mailbox: imx: add i.MX8ULP MU support
Gentle ping..
Ignore, I see it in next branch.
Thanks,
Peng.
Thanks,
Peng.
quoted
From: Peng Fan <peng.fan@nxp.com>
V2:
Add A-b from Rob in patch 1
Fix RXDB for i.MX8ULP in patch 4
i.MX8ULP generic MU is a different IP compared with previous i.MX chips.
It has different register layout and bit position, but the register
name and bit definitions are almost same with previous i.MX MU.
So we extend the current imx-mailbox driver to support i.MX8ULP.
Peng Fan (4):
dt-bindings: mailbox: imx-mu: add i.MX8ULP MU support
mailbox: imx: replace the xTR/xRR array with single register
mailbox: imx: add xSR/xCR register array
mailbox: imx-mailbox: support i.MX8ULP MU
.../devicetree/bindings/mailbox/fsl,mu.yaml | 1 +
drivers/mailbox/imx-mailbox.c | 196
+++++++++++-------
2 files changed, 123 insertions(+), 74 deletions(-)
--
2.30.0
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