On Thu, May 20, 2021 at 03:13:55PM +0100, Robin Murphy wrote:

By "mdev-like" I mean it's very similar in shape to the general SIOV-style
mediated device concept - i.e. a physical device with an awareness of
operating on multiple contexts at once, using a Substream ID/PASID for each
one - but instead of exposing control of the contexts to anyone else, they
remain hidden behind the kernel driver which already has its own abstracted
uAPI, so overall it ends up as more just internal housekeeping than any
actual mediation. We were looking at the mdev code for inspiration, but
directly using it was never the plan.

Well:
 - Who maps memory into the IOASID (ie the specific sub stream id)?
 - What memory must be mapped?
 - Who triggers DMA to this memory?
 

The driver simply needs to keep track of the domains and PASIDs -
when a process submits some work, it can look up the relevant
domain, iommu_map() the user pages to the right addresses, dma_map()
them for coherency, then poke in the PASID as part of scheduling the
work on the physical device.

If you are doing stuff like this then the /dev/ioasid is what you
actually want. The userprocess can create its own IOASID, program the
io page tables for that IOASID to point to pages as it wants and then
just hand over a fully instantiated io page table to the device
driver.

What you are describing is the literal use case of /dev/ioasid - a
clean seperation of managing the IOMMU related parts through
/dev/ioasid and the device driver itself is only concerned with
generating device DMA that has the proper PASID/substream tag.

The entire point is to not duplicate all the iommu code you are
describing having written into every driver that just wants an IOASID.

In particular, you are talking about having a substream capable device
and driver but your driver's uAPI is so limited it can't address the
full range of substream configurations:

 - A substream pointing at a SVA
 - A substream pointing a IO page table nested under another
 - A substream pointing at an IOMMU page table shared by many users

And more. Which is bad.

quoted

We already talked about this on the "how to use PASID from the kernel"
thread.

Do you have a pointer to the right thread so I can catch up? It's not the
easiest thing to search for on lore amongst all the other PASID-related
business :(

Somewhere in here:

http://lore.kernel.org/r/20210517143758.GP1002214@nvidia.com (local)

FWIW my non-SVA view is that a PASID is merely an index into a set of
iommu_domains, and in that context it doesn't even really matter *who*
allocates them, only that the device driver and IOMMU driver are in sync :)

Right, this is where /dev/ioasid is going.

However it gets worked out at the kAPI level in the iommu layer the
things you asked for are intended to be solved, and lots more.

Jason

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