Thread (32 messages) 32 messages, 5 authors, 2021-05-12

Re: [PATCH v1 01/13] arm64: Do not enable uaccess for flush_icache_range

From: Fuad Tabba <hidden>
Date: 2021-05-12 09:00:23

Hi Robin,
quoted
-SYM_FUNC_START(__flush_cache_user_range)
+.macro       __flush_cache_range, needs_uaccess
+     .if     \needs_uaccess
      uaccess_ttbr0_enable x2, x3, x4
+     .endif
Nit: this feels like it belongs directly in __flush_cache_user_range()
rather than being hidden in the macro, since it's not really an integral
part of the cache maintenance operation itself.
I will fix this in v2.

Thanks,
/fuad
Robin.
quoted
  alternative_if ARM64_HAS_CACHE_IDC
      dsb     ishst
      b       7f
@@ -47,7 +37,11 @@ alternative_else_nop_endif
      sub     x3, x2, #1
      bic     x4, x0, x3
  1:
+     .if     \needs_uaccess
  user_alt 9f, "dc cvau, x4",  "dc civac, x4",  ARM64_WORKAROUND_CLEAN_CACHE
+     .else
+alternative_insn "dc cvau, x4",  "dc civac, x4",  ARM64_WORKAROUND_CLEAN_CACHE
+     .endif
      add     x4, x4, x2
      cmp     x4, x1
      b.lo    1b
@@ -58,15 +52,47 @@ alternative_if ARM64_HAS_CACHE_DIC
      isb
      b       8f
  alternative_else_nop_endif
-     invalidate_icache_by_line x0, x1, x2, x3, 9f
+     invalidate_icache_by_line x0, x1, x2, x3, \needs_uaccess, 9f
  8:  mov     x0, #0
  1:
+     .if     \needs_uaccess
      uaccess_ttbr0_disable x1, x2
+     .endif
      ret
+
+     .if     \needs_uaccess
  9:
      mov     x0, #-EFAULT
      b       1b
+     .endif
+.endm
+
+/*
+ *   flush_icache_range(start,end)
+ *
+ *   Ensure that the I and D caches are coherent within specified region.
+ *   This is typically used when code has been written to a memory region,
+ *   and will be executed.
+ *
+ *   - start   - virtual start address of region
+ *   - end     - virtual end address of region
+ */
+SYM_FUNC_START(__flush_icache_range)
+     __flush_cache_range needs_uaccess=0
  SYM_FUNC_END(__flush_icache_range)
+
+/*
+ *   __flush_cache_user_range(start,end)
+ *
+ *   Ensure that the I and D caches are coherent within specified region.
+ *   This is typically used when code has been written to a memory region,
+ *   and will be executed.
+ *
+ *   - start   - virtual start address of region
+ *   - end     - virtual end address of region
+ */
+SYM_FUNC_START(__flush_cache_user_range)
+     __flush_cache_range needs_uaccess=1
  SYM_FUNC_END(__flush_cache_user_range)

  /*
@@ -86,7 +112,7 @@ alternative_else_nop_endif

      uaccess_ttbr0_enable x2, x3, x4

-     invalidate_icache_by_line x0, x1, x2, x3, 2f
+     invalidate_icache_by_line x0, x1, x2, x3, 1, 2f
      mov     x0, xzr
  1:
      uaccess_ttbr0_disable x1, x2
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