-----Original Message-----
From: Christophe JAILLET <redacted>
Sent: 01 May 2021 04:55 PM
To: mturquette@baylibre.com; sboyd@kernel.org; Michal Simek
[off-list ref]; quanyang.wang@windriver.com; Rajan Vaja
[off-list ref]; Jolly Shah [off-list ref]; Tejas Patel
[off-list ref]; Shubhrajyoti Datta [off-list ref]
Cc: linux-clk@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
kernel@vger.kernel.org; kernel-janitors@vger.kernel.org; Christophe JAILLET
[off-list ref]
Subject: [PATCH] clk: zynqmp: pll: Remove some dead code

'clk_hw_set_rate_range()' does not return any error code and 'ret' is
known to be 0 at this point, so this message can never be displayed.

Remove it.

Fixes: 3fde0e16d016 ("drivers: clk: Add ZynqMP clock driver")
Signed-off-by: Christophe JAILLET <redacted>
---
HOWEVER, the message is about 'clk_set_rate_range()', not
'clk_hw_set_rate_range()'. So the message is maybe correct and the
'xxx_rate_range()' function incorrect.
---
 drivers/clk/zynqmp/pll.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c
index abe6afbf3407..af11e9400058 100644
--- a/drivers/clk/zynqmp/pll.c
+++ b/drivers/clk/zynqmp/pll.c

@@ -331,8 +331,6 @@ struct clk_hw *zynqmp_clk_register_pll(const char *name,

u32 clk_id,
 	}

 	clk_hw_set_rate_range(hw, PS_PLL_VCO_MIN, PS_PLL_VCO_MAX);
-	if (ret < 0)
-		pr_err("%s:ERROR clk_set_rate_range failed %d\n", name, ret);