[PATCH v5 3/4] ARM: dts: rockchip: move and restyle grf nodes rk3066/rk3188
From: Johan Jonker <hidden>
Date: 2021-05-12 12:24:09
Also in:
linux-devicetree, linux-phy, linux-rockchip, lkml
Subsystem:
the rest · Maintainer:
Linus Torvalds
With grf.txt converted to YAML a lot of compatibles did not have 'simple-mfd' added in the old binding. That implies that if you have child nodes they need to be documented. Make the new layout fit for rk3066/rk3188, move and restyle the grf nodes. Remove rockchip,grf from usbphy node. Add "#phy-cells", because it is a required property by phy-provider.yaml With the conversion of syscon.yaml minItems for compatibles was set to 2. Current Rockchip rk3xxx.dtsi file only uses "syscon" for the grf registers. Add "syscon", "simple-mfd" compatible for rk3066/rk3188 to reduce notifications produced with: make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml Changed compatibles: "rockchip,rk3066-grf", "syscon", "simple-mfd" "rockchip,rk3188-grf", "syscon", "simple-mfd" Signed-off-by: Johan Jonker <redacted> --- arch/arm/boot/dts/rk3066a.dtsi | 53 +++++++++++++++++++++++------------------- arch/arm/boot/dts/rk3188.dtsi | 53 +++++++++++++++++++++++------------------- arch/arm/boot/dts/rk3xxx.dtsi | 2 +- 3 files changed, 59 insertions(+), 49 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 8e087c34b..30dcf557e 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi@@ -266,30 +266,6 @@ status = "disabled"; }; - usbphy: phy { - compatible = "rockchip,rk3066a-usb-phy", "rockchip,rk3288-usb-phy"; - rockchip,grf = <&grf>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - usbphy0: usb-phy@17c { - #phy-cells = <0>; - reg = <0x17c>; - clocks = <&cru SCLK_OTGPHY0>; - clock-names = "phyclk"; - #clock-cells = <0>; - }; - - usbphy1: usb-phy@188 { - #phy-cells = <0>; - reg = <0x188>; - clocks = <&cru SCLK_OTGPHY1>; - clock-names = "phyclk"; - #clock-cells = <0>; - }; - }; - pinctrl: pinctrl { compatible = "rockchip,rk3066a-pinctrl"; rockchip,grf = <&grf>;
@@ -702,6 +678,35 @@ power-domains = <&power RK3066_PD_GPU>; }; +&grf { + compatible = "rockchip,rk3066-grf", "syscon", "simple-mfd"; + + usbphy: usbphy { + compatible = "rockchip,rk3066a-usb-phy", + "rockchip,rk3288-usb-phy"; + #phy-cells = <0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + usbphy0: usb-phy@17c { + reg = <0x17c>; + clocks = <&cru SCLK_OTGPHY0>; + clock-names = "phyclk"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + + usbphy1: usb-phy@188 { + reg = <0x188>; + clocks = <&cru SCLK_OTGPHY1>; + clock-names = "phyclk"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + }; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_xfer>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index f438170b4..41a912acb 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi@@ -214,30 +214,6 @@ }; }; - usbphy: phy { - compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy"; - rockchip,grf = <&grf>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - usbphy0: usb-phy@10c { - #phy-cells = <0>; - reg = <0x10c>; - clocks = <&cru SCLK_OTGPHY0>; - clock-names = "phyclk"; - #clock-cells = <0>; - }; - - usbphy1: usb-phy@11c { - #phy-cells = <0>; - reg = <0x11c>; - clocks = <&cru SCLK_OTGPHY1>; - clock-names = "phyclk"; - #clock-cells = <0>; - }; - }; - pinctrl: pinctrl { compatible = "rockchip,rk3188-pinctrl"; rockchip,grf = <&grf>;
@@ -637,6 +613,35 @@ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>; }; +&grf{ + compatible = "rockchip,rk3188-grf", "syscon", "simple-mfd"; + + usbphy: usbphy { + compatible = "rockchip,rk3188-usb-phy", + "rockchip,rk3288-usb-phy"; + #phy-cells = <0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + usbphy0: usb-phy@10c { + reg = <0x10c>; + clocks = <&cru SCLK_OTGPHY0>; + clock-names = "phyclk"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + + usbphy1: usb-phy@11c { + reg = <0x11c>; + clocks = <&cru SCLK_OTGPHY1>; + clock-names = "phyclk"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + }; +}; + &gpu { compatible = "rockchip,rk3188-mali", "arm,mali-400"; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index 755c946f1..d473552e8 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi@@ -256,7 +256,7 @@ }; grf: grf@20008000 { - compatible = "syscon"; + compatible = "syscon", "simple-mfd"; reg = <0x20008000 0x200>; };
--
2.11.0
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