On Mon, May 10, 2021 at 01:39:04PM +0800, Leo Yan wrote:
On Fri, May 07, 2021 at 01:02:35PM +0300, James Clark wrote:
quoted
On 07/05/2021 12:58, James Clark wrote:
quoted
There is an intermittent issue on Trogdor devices that
results in all Coresight timestamps having a value of zero.
I've attached a file here that has the issue. From the dump you
can see the zero timestamps:
Idx:69; ID:10; I_TIMESTAMP : Timestamp.; Updated val = 0x0
Idx:71; ID:10; I_ATOM_F1 : Atom format 1.; E
Idx:72; ID:10; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0xFFFFFFE723C65824 ~[0x5824]
This doesn't have an impact on decoding as they end up being
decoded in file order as in with timeless mode.
Just remind, as Mike has mentioned that if the timestamp is zero, it
means the hardware setting for timestamp is not enabled properly. So
for system wide or per CPU mode tracing, it's better to double check
what's the reason the timestamp is not enabled properly.
IIUC, this patch breaks the existed rational in the code. Let's think
about there have 4 CPUs, every CPU has its own AUX trace buffer, and
when decode the trace data, it will use 4 queues to track the packets
and every queue has its timestamp.
CPU0: cs_etm_queue -> ... -> packet_queue->timestamp
CPU1: cs_etm_queue -> ... -> packet_queue->timestamp
CPU2: cs_etm_queue -> ... -> packet_queue->timestamp
CPU3: cs_etm_queue -> ... -> packet_queue->timestamp
The issue is if all CPUs' timestamp are zero, it's impossible to find
a way to synthesize samples in the right time order.
I saw Denis's replying for the hardware issue for timestamp, wander if
can add a new option "--force-aux-ts-zero" to override the hardware
timestamp issue. Without the option "--force-aux-ts-zero", the
developers still have chance to observe the failure case caused by the
abnormal timestamps.
Thanks,
Leo
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel