Re: [PATCH v2 3/3] ARM: cache-v7: get rid of mini-stack
From: Ard Biesheuvel <ardb@kernel.org>
Date: 2021-03-01 16:11:52
On Mon, 1 Mar 2021 at 16:53, Russell King - ARM Linux admin [off-list ref] wrote:
On Wed, Feb 10, 2021 at 07:55:32PM +0100, Ard Biesheuvel wrote:quoted
Now that we have reduced the number of registers that we need to preserve when calling v7_invalidate_l1 from the boot code, we can use scratch registers to preserve the remaining ones, and get rid of the mini stack entirely. This works around any issues regarding cache behavior in relation to the uncached accesses to this memory, which is hard to get right in the general case (i.e., both bare metal and under virtualization) While at it, switch v7_invalidate_l1 to using ip as a scratch register instead of r4. This makes the function AAPCS compliant, and removes the need to stash r4 in ip across the call.You don't mention that we only do this for MP capable cores, which is in itself quite a big change - maybe that change should be a separate commit?
I'm not quite sure I understand what you are referring to here. All call sites are updated to use the macro to call v7_invalidate_l1(), so I don't think the UP-only and SMP-capable setup() paths are treated any differently. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel