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Hi,

Just letting everyone know - merging only the DT part of this patchset
broke AHCI on all Marvell Armada 7k8k / CN913x platforms in v5.11
release.

FYI, I'm currently updating the device trees in EDK2 based on the
v5.11 DT sources - I'm going to keep the previous binding anyway, as
the new one breaks booting with AHCI not only for older Linux
versions, but also for other OSs (yet another argument to use ACPI).

Best regards,
Marcin


sob., 27 lut 2021 o 12:02 Sven Auhagen [off-list ref] napisał(a):

Hello,

can I ask about the status of this patch?
As far as I can tell it was not merged to ata and I did not receive
any further feedback that there was a problem with the patch series.

As a matter of fact the device tree part was already merged by
Gregory Clement.

Best and thanks
Sven

On Mon, Nov 09, 2020 at 06:39:39PM +0100, sven.auhagen@voleatech.de wrote:

quoted

From: Sven Auhagen <redacted>

Hello,

There were already 4 versions of this series from Miquèl.
I talked to Miquèl and I fixed up the last comments from v4.
I am looking for feedback if this patch series is now ready to be merged
and what should be further changed.

Here is the original cover letter:

Some time ago, when the initial support for Armada CP110 was
contributed, the SATA core was not able to handle per-port
interrupts. Despite the hardware reality, the device tree only
represents one main interrupt for the two ports. Having both SATA
ports enabled at the same time has been achieved by a hack in the ICU
driver(1) that faked the use of the two interrupts, no matter which
SATA port was in use.

Now that the SATA core is ready to handle more than one interrupt,
this series adds support for it in the libahci_platform code. The
CP110 device tree must be updated to reflect the two SATA ports
available and their respective interrupts. To do not break DT backward
compatibility, the ahci_platform driver now embeds a special quirk
which checks if the DT is valid (only for A8k compatible) and, if
needed, creates the two missing sub-nodes, and assign them the
relevant "reg" and "interrupts" properties, before removing the main
SATA node "interrupts" one.

(1) The ICU is an irqchip aggregating the CP110 (south-bridge)
interrupts into MSIs for the AP806 (north-bridge).

Best
Sven

Change from v2:
  * Fix commit message of custom irq init for host init

Change from v1:
  * Add a patch to enable custom irq initialization in
    plattform init host
  * Add multi_irq_host_ack callback for the msi irq handler
  * Rework the ahci mvebu patch to initiate the irq and use
    the new multi_irq_host_ack to handle the custom irq code.
    Remove the custom irq handler and duplicate code.
  * Fix the armada8k backwards compatibility code
  * Rename AHCI_PLATFORM_A8K_QUIRK to AHCI_PLATFORM_ARMADA8K_QUIRK

Miquel Raynal (5):
  ata: ahci: mvebu: Rename a platform data flag
  ata: ahci: mvebu: Support A8k compatible
  irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack
  dt-bindings: ata: Update ahci bindings with possible per-port
    interrupts
  dt-bindings: ata: Update ahci_mvebu bindings

Sven Auhagen (4):
  ata: libahci_platform: Do not try to get an IRQ when
    AHCI_HFLAG_MULTI_MSI is set
  ata: ahci: add ack callback to multi irq handler
  ata: ahci: mvebu: Add support for A8k legacy DT bindings
  arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts

 .../devicetree/bindings/ata/ahci-platform.txt |   7 +
 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |   6 +-
 drivers/ata/ahci.h                            |   2 +
 drivers/ata/ahci_mvebu.c                      | 143 ++++++++++++++++--
 drivers/ata/libahci.c                         |   4 +
 drivers/ata/libahci_platform.c                |  19 ++-
 drivers/irqchip/irq-mvebu-icu.c               |  18 ---
 include/linux/ahci_platform.h                 |   1 +
 8 files changed, 160 insertions(+), 40 deletions(-)

--
2.20.1

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