Thread (6 messages) flat view 6 messages, 3 authors, 2021-03-31

Re: [PATCH] clk: imx8mq: Correct the pcie1 sels

From: Stephen Boyd <sboyd@kernel.org>
Date: 2021-03-31 02:18:24
Also in: linux-clk, lkml

Quoting Richard Zhu (2021-03-15 01:17:48)
- The sys2_pll_50m should be one of the clock sels of PCIE_AUX clock.
Change the sys2_pll_500m to sys2_pll_50m.
- Correct one mis-spell of the imx8mq_pcie1_ctrl_sels definition, from
"sys2_pll_250m" to "sys2_pll_333m".

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
Any Fixes tag?

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