Hi Marcel,

On Mon, 2021-03-29 at 00:49 +0000, Marcel Ziswiler wrote:

Hi Liu

On Tue, 2021-03-23 at 17:09 +0800, Liu Ying wrote:

quoted

On Tue, 2021-03-23 at 01:03 +0000, Marcel Ziswiler wrote:

quoted

Hi Liu

Some further discrepancy with them binding examples:

arch/arm64/boot/dts/freescale/imx8qxp.dtsi:335.9-36: Warning (reg_format): /dpu@56180000:reg: property has
invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:508.9-35: Warning (reg_format): /syscon@56221000:reg: property has
invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:601.9-34: Warning (reg_format): /phy@56228300:reg: property has
invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:613.9-36: Warning (reg_format): /pixel-combiner@56020000:reg:
property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)

And with that I am unable to bring it up:

[    1.714498] imx8qxp-ldb 5622100000001000.syscon:ldb: [drm:ldb_init_helper] *ERROR* failed to get regmap: -
12
[    1.724441] imx8qxp-ldb: probe of 5622100000001000.syscon:ldb failed with error -12
[    1.734983] imx8qxp-pixel-combiner 5602000000010000.pixel-combiner: invalid resource
[    1.742830] imx8qxp-pixel-combiner: probe of 5602000000010000.pixel-combiner failed with error -22
[    1.754040] imx8qxp-display-pixel-link dc0-pixel-link0: [drm:imx8qxp_pixel_link_bridge_probe] *ERROR*
failed
to get pixel link node alias id: -19
[    1.769626] imx8qxp-pxl2dpi 5622100000001000.syscon:pxl2dpi: [drm:imx8qxp_pxl2dpi_bridge_probe] *ERROR*
failed to get regmap: -12
[    1.781397] imx8qxp-pxl2dpi: probe of 5622100000001000.syscon:pxl2dpi failed with error -12
[    1.840547] imx8qxp-lpcg-clk 59580000.clock-controller: deferred probe timeout, ignoring dependency
[    1.840571] imx8qxp-lpcg-clk: probe of 59580000.clock-controller failed with error -110

Any suggestions welcome. Thanks!

Please reference the patch set I shared in my last reply and see how it
goes.  Thanks.

Thank you very much. After a little bit of fiddling I can confirm that this also works fine on a Toradex
Colibri iMX8X [1] with either a Capacitive Touch Display 10.1" LVDS which has a Logic Technologies LT170410-
2WHC [2] single-channel panel inside or a dual-channel LG LP156WF1 full HD panel.

Thanks a lot for your testing!

Glad to know that the two LVDS panels work on Toradex Colibri iMX8X.

During boot I noticed quite some clocking/power domain related messages:

[    0.537965] gpt0_clk: failed to attached the power domain -2

[    0.562372] dc1_disp0_clk: failed to attached the power domain -2
[    0.562800] dc1_disp0_clk: failed to get clock parent -22
[    0.562858] dc1_disp0_clk: failed to get clock rate -22

[    0.563059] dc1_disp1_clk: failed to attached the power domain -2
[    0.563463] dc1_disp1_clk: failed to get clock parent -22
[    0.563514] dc1_disp1_clk: failed to get clock rate -22

[    0.563773] dc1_pll0_clk: failed to attached the power domain -2
[    0.564174] dc1_pll0_clk: failed to get clock rate -22

[    0.564413] dc1_pll1_clk: failed to attached the power domain -2
[    0.564838] dc1_pll1_clk: failed to get clock rate -22

[    0.565099] dc1_bypass0_clk: failed to attached the power domain -2
[    0.565516] dc1_bypass0_clk: failed to get clock rate -22

[    0.565755] dc1_bypass1_clk: failed to attached the power domain -2
[    0.566159] dc1_bypass1_clk: failed to get clock rate -22

[    0.574493] lvds0_i2c0_clk: failed to attached the power domain -2
[    0.574894] lvds0_i2c0_clk: failed to get clock rate -22

[    0.575134] lvds0_i2c1_clk: failed to attached the power domain -2
[    0.575526] lvds0_i2c1_clk: failed to get clock rate -22

[    0.575785] lvds0_pwm0_clk: failed to attached the power domain -2
[    0.576189] lvds0_pwm0_clk: failed to get clock rate -22

[    0.576417] lvds1_i2c0_clk: failed to attached the power domain -2
[    0.576854] lvds1_i2c0_clk: failed to get clock rate -22

[    0.577129] lvds1_i2c1_clk: failed to attached the power domain -2
[    0.577554] lvds1_i2c1_clk: failed to get clock rate -22

[    0.577787] lvds1_pwm0_clk: failed to attached the power domain -2
[    0.578198] lvds1_pwm0_clk: failed to get clock rate -22

[    0.578464] mipi_csi0_core_clk: failed to attached the power domain -2

[    0.579104] mipi_csi0_esc_clk: failed to attached the power domain -2

[    0.579738] mipi_csi0_i2c0_clk: failed to attached the power domain -2

[    0.580368] mipi_csi0_pwm0_clk: failed to attached the power domain -2

And the following repeats a couple dozens of times:

[    4.391495] dc1_disp0_clk: failed to get clock parent -22
[    4.398532] dc1_disp1_clk: failed to get clock parent -22

As I mentioned before, there will be logs like 'dc1_disp0_clk: failed
to get clock parent -22' on i.MX8qxp and i.MX8qm/qxp specific clocks
are not split yet. DC1 and LVDS0/1 are i.MX8qm specific. So, once they
are split up, I assume there won't be those logs any more.

If you don't apply the below two patches for i.MX8qm, then dc1 and
lvds0/1 relevant logs won't come.  That doesn't impact the i.MX8qxp
displays.

clk: imx: clk-imx8qxp: Add I2C and PWM SCU clocks in LVDS0/1 subsystems
clk: imx: clk-imx8qxp: Add some clocks for i.MX8qm DC1 subsystem


The latest Shawn's for-next branch also generates the gpt and mipi_csi
relevant logs on my i.MX8qxp MEK board like below.  So, they are not
related to my patch set.

dmesg | grep clk
[    1.091534] gpt0_clk: failed to attached the power domain -2
[    1.133131] mipi_csi0_core_clk: failed to attached the power domain
-2
[    1.139849] mipi_csi0_esc_clk: failed to attached the power domain
-2
[    1.146441] mipi_csi0_i2c0_clk: failed to attached the power domain
-2
[    1.153312] mipi_csi0_pwm0_clk: failed to attached the power domain
-2

On my i.MX8qm MEK board, the latest Shawn's for-next branch behaves
like this:
dmesg | grep clk
[    0.222517] a35_clk: failed to get clock rate -22
[    0.225331] gpt0_clk: failed to attached the power domain -2
[    0.232859] pwm_clk: failed to attached the power domain -2
[    0.233085] pwm_clk: failed to get clock rate -22
[    0.233158] lcd_clk: failed to attached the power domain -2
[    0.233382] lcd_clk: failed to get clock rate -22
[    0.246576] mipi_csi0_core_clk: failed to attached the power domain
-2
[    0.246899] mipi_csi0_esc_clk: failed to attached the power domain
-2
[    0.247218] mipi_csi0_i2c0_clk: failed to attached the power domain
-2
[    0.247515] mipi_csi0_pwm0_clk: failed to attached the power domain
-2
[    1.510195] imx8qxp-lpcg-clk 5a4a0000.clock-controller: deferred
probe timeout, ignoring dependency
[    1.521361] imx8qxp-lpcg-clk: probe of 5a4a0000.clock-controller
failed with error -110

@Aisheng, it looks like we'd better to suppress those warning logs soon
by splitting i.MX8qm/qxp specific clocks up?

And finally it spits the following:

[    4.670303] imx8qxp-lpcg-clk 59580000.clock-controller: deferred probe timeout, ignoring dependency
[    4.679629] imx8qxp-lpcg-clk: probe of 59580000.clock-controller failed with error -110

I don't see this on my i.MX8qxp MEK board. It looks like it's related
to the 'dsp_lpcg: clock-controller@59580000' node in
imx8-ss-audio.dtsi. Does this reproduce with Shawn's for-next
branch(without my patch set) for you?

Despite those messages the displays do work fine once booted.

I am currently running this with SCFW, SECO, TF-A and U-Boot based off NXP's latest downstream BSP 5.4.70-
2.3.0. Not sure whether or not especially the used SCFW version could cause some issues. What SCFW are you
using?

Full boot logs may be found here [3].

You may add the following to the whole series.

Tested-by: Marcel Ziswiler <redacted> # Colibri iMX8X, LT170410-2WHC, LP156WF1

Thanks for your tag.

Thanks again and just let us know if we may test anything else for you.

Maybe, any Toradex i.MX8qm board with LVDS display, please?

Regards,
Liu Ying

[1] commit ba5a5615d54f ("arm64: dts: freescale: add initial support for colibri imx8x")
[2] commit 5728fe7fa539 ("drm/panel: simple: add display timings for logic technologies displays")
[3] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fshare.toradex.com%2Fs30wwspcr9iwyrg&data=04%7C01%7Cvictor.liu%40nxp.com%7Ca51f827482704468d27208d8f24c75dd%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637525757505899800%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=VziEUvn3pnk7QvgIl58CuM8VHMqm6Y5xOuod4ali1Zk%3D&reserved=0

quoted

Liu Ying

Cheers

Marcel

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