Thread (53 messages) 53 messages, 8 authors, 2021-04-19

Re: [PATCH v5 05/19] arm64: Add support for trace synchronization barrier

From: Catalin Marinas <catalin.marinas@arm.com>
Date: 2021-03-23 18:22:47
Also in: lkml

Hi Suzuki?

On Tue, Mar 23, 2021 at 12:06:33PM +0000, Suzuki K Poulose wrote:
tsb csync synchronizes the trace operation of instructions.
The instruction is a nop when FEAT_TRF is not implemented.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <redacted>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <redacted>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
How do you plan to merge these patches? If they go via the coresight
tree:

Acked-by: Catalin Marinas <catalin.marinas@arm.com>

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