[PATCH v5 1/6] irqchip/gic-v3-its: Add a cache invalidation right after vPE unmapping
From: Shenming Lu <hidden>
Date: 2021-03-22 06:03:38
Also in:
kvm, kvmarm, lkml
Subsystem:
arm generic interrupt controller drivers, irqchip drivers, the rest · Maintainers:
Marc Zyngier, Thomas Gleixner, Linus Torvalds
From: Marc Zyngier <maz@kernel.org> Since there may be a direct read from the CPU side to the VPT after unmapping the vPE, we add a cache coherency maintenance at the end of its_vpe_irq_domain_deactivate() to ensure the validity of the VPT read later. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Shenming Lu <redacted> --- drivers/irqchip/irq-gic-v3-its.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index ed46e6057e33..4eb907f65bd0 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c@@ -4554,6 +4554,15 @@ static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, its_send_vmapp(its, vpe, false); } + + /* + * There may be a direct read to the VPT after unmapping the + * vPE, to guarantee the validity of this, we make the VPT + * memory coherent with the CPU caches here. + */ + if (find_4_1_its() && !atomic_read(&vpe->vmapp_count)) + gic_flush_dcache_to_poc(page_address(vpe->vpt_page), + LPI_PENDBASE_SZ); } static const struct irq_domain_ops its_vpe_domain_ops = {
--
2.19.1
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