[PATCH] MIPS: ralink: mt7621: add memory detection support

From: Chuanhong Guo <redacted>

mt7621 has the following memory map:
0x0-0x1c000000: lower 448m memory
0x1c000000-0x2000000: peripheral registers
0x20000000-0x2400000: higher 64m memory

detect_memory_region in arch/mips/kernel/setup.c only adds the first
memory region and isn't suitable for 512m memory detection because
it may accidentally read the memory area for peripheral registers.

This commit adds memory detection capability for mt7621:
  1. Add the highmem area when 512m is detected.
  2. Guard memcmp from accessing peripheral registers:
     This only happens when a user decided to change kernel load address
     to 256m or higher address. Since this is a quite unusual case, we
     just skip 512m testing and return 256m as memory size.

Signed-off-by: Chuanhong Guo <redacted>
[Minor commit message reword, make mt7621_memory_detect static]
Signed-off-by: Ilya Lipnitskiy <redacted>
---
 arch/mips/include/asm/mach-ralink/mt7621.h |  7 +++---
 arch/mips/ralink/common.h                  |  1 +
 arch/mips/ralink/mt7621.c                  | 29 +++++++++++++++++++---
 arch/mips/ralink/of.c                      |  2 ++
 4 files changed, 32 insertions(+), 7 deletions(-)

diff --git a/arch/mips/include/asm/mach-ralink/mt7621.h b/arch/mips/include/asm/mach-ralink/mt7621.h
index e1af1ba50bd8..6bbf082dd149 100644
--- a/arch/mips/include/asm/mach-ralink/mt7621.h
+++ b/arch/mips/include/asm/mach-ralink/mt7621.h

@@ -24,9 +24,10 @@
 #define CHIP_REV_VER_SHIFT		8
 #define CHIP_REV_ECO_MASK		0xf
 
-#define MT7621_DRAM_BASE                0x0
-#define MT7621_DDR2_SIZE_MIN		32
-#define MT7621_DDR2_SIZE_MAX		256
+#define MT7621_LOWMEM_BASE		0x0
+#define MT7621_LOWMEM_MAX_SIZE		0x1C000000
+#define MT7621_HIGHMEM_BASE		0x20000000
+#define MT7621_HIGHMEM_SIZE		0x4000000
 
 #define MT7621_CHIP_NAME0		0x3637544D
 #define MT7621_CHIP_NAME1		0x20203132

diff --git a/arch/mips/ralink/common.h b/arch/mips/ralink/common.h
index 4bc65b7a3241..113dca5ac129 100644
--- a/arch/mips/ralink/common.h
+++ b/arch/mips/ralink/common.h

@@ -17,6 +17,7 @@ struct ralink_soc_info {
 	unsigned long mem_size;
 	unsigned long mem_size_min;
 	unsigned long mem_size_max;
+	void (*mem_detect)(void);
 };
 extern struct ralink_soc_info soc_info;
 

diff --git a/arch/mips/ralink/mt7621.c b/arch/mips/ralink/mt7621.c
index ca0ac607b0f3..d6616b0ad610 100644
--- a/arch/mips/ralink/mt7621.c
+++ b/arch/mips/ralink/mt7621.c

@@ -9,7 +9,9 @@
 #include <linux/init.h>
 #include <linux/slab.h>
 #include <linux/sys_soc.h>
+#include <linux/memblock.h>
 
+#include <asm/bootinfo.h>
 #include <asm/mipsregs.h>
 #include <asm/smp-ops.h>
 #include <asm/mips-cps.h>

@@ -49,6 +51,8 @@
 #define MT7621_GPIO_MODE_SDHCI_SHIFT	18
 #define MT7621_GPIO_MODE_SDHCI_GPIO	1
 
+static void *detect_magic __initdata = detect_memory_region;
+
 static struct rt2880_pmx_func uart1_grp[] =  { FUNC("uart1", 0, 1, 2) };
 static struct rt2880_pmx_func i2c_grp[] =  { FUNC("i2c", 0, 3, 2) };
 static struct rt2880_pmx_func uart3_grp[] = {

@@ -110,6 +114,26 @@ phys_addr_t mips_cpc_default_phys_base(void)
 	panic("Cannot detect cpc address");
 }
 
+static void __init mt7621_memory_detect(void)
+{
+	void *dm = &detect_magic;
+	phys_addr_t size;
+
+	for (size = 32 * SZ_1M; size < 256 * SZ_1M; size <<= 1) {
+		if (!__builtin_memcmp(dm, dm + size, sizeof(detect_magic)))
+			break;
+	}
+
+	if ((size == 256 * SZ_1M) &&
+	    (CPHYSADDR(dm + size) < MT7621_LOWMEM_MAX_SIZE) &&
+	    __builtin_memcmp(dm, dm + size, sizeof(detect_magic))) {
+		memblock_add(MT7621_LOWMEM_BASE, MT7621_LOWMEM_MAX_SIZE);
+		memblock_add(MT7621_HIGHMEM_BASE, MT7621_HIGHMEM_SIZE);
+	} else {
+		memblock_add(MT7621_LOWMEM_BASE, size);
+	}
+}
+
 void __init ralink_of_remap(void)
 {
 	rt_sysc_membase = plat_of_remap_node("mtk,mt7621-sysc");

@@ -194,10 +218,7 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
 		(rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK,
 		(rev & CHIP_REV_ECO_MASK));
 
-	soc_info->mem_size_min = MT7621_DDR2_SIZE_MIN;
-	soc_info->mem_size_max = MT7621_DDR2_SIZE_MAX;
-	soc_info->mem_base = MT7621_DRAM_BASE;
-
+	soc_info->mem_detect = mt7621_memory_detect;
 	rt2880_pinmux_data = mt7621_pinmux_data;
 
 	soc_dev_init(soc_info, rev);

diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c
index 8286c3521476..0c5de07da097 100644
--- a/arch/mips/ralink/of.c
+++ b/arch/mips/ralink/of.c

@@ -78,6 +78,8 @@ void __init plat_mem_setup(void)
 	of_scan_flat_dt(early_init_dt_find_memory, NULL);
 	if (memory_dtb)
 		of_scan_flat_dt(early_init_dt_scan_memory, NULL);
+	else if (soc_info.mem_detect)
+		soc_info.mem_detect();
 	else if (soc_info.mem_size)
 		memblock_add(soc_info.mem_base, soc_info.mem_size * SZ_1M);
 	else

-- 
2.31.0


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On Tue, Mar 16, 2021 at 10:59:02PM -0700, Ilya Lipnitskiy wrote:

From: Chuanhong Guo <redacted>

mt7621 has the following memory map:
0x0-0x1c000000: lower 448m memory
0x1c000000-0x2000000: peripheral registers
0x20000000-0x2400000: higher 64m memory

detect_memory_region in arch/mips/kernel/setup.c only adds the first
memory region and isn't suitable for 512m memory detection because
it may accidentally read the memory area for peripheral registers.

This commit adds memory detection capability for mt7621:
  1. Add the highmem area when 512m is detected.
  2. Guard memcmp from accessing peripheral registers:
     This only happens when a user decided to change kernel load address
     to 256m or higher address. Since this is a quite unusual case, we
     just skip 512m testing and return 256m as memory size.

[...]

I get

WARNING: modpost: vmlinux.o(.text+0x132c): Section mismatch in reference from the function prom_soc_init() to the function .init.text:mt7621_memory_detect()
The function prom_soc_init() references
the function __init mt7621_memory_detect().
This is often because prom_soc_init lacks a __init 
annotation or the annotation of mt7621_memory_detect is wrong.

Can you please fix this ?

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

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On Thu, Mar 25, 2021 at 3:01 AM Thomas Bogendoerfer
[off-list ref] wrote:

On Tue, Mar 16, 2021 at 10:59:02PM -0700, Ilya Lipnitskiy wrote:

quoted

From: Chuanhong Guo <redacted>

mt7621 has the following memory map:
0x0-0x1c000000: lower 448m memory
0x1c000000-0x2000000: peripheral registers
0x20000000-0x2400000: higher 64m memory

detect_memory_region in arch/mips/kernel/setup.c only adds the first
memory region and isn't suitable for 512m memory detection because
it may accidentally read the memory area for peripheral registers.

This commit adds memory detection capability for mt7621:
  1. Add the highmem area when 512m is detected.
  2. Guard memcmp from accessing peripheral registers:
     This only happens when a user decided to change kernel load address
     to 256m or higher address. Since this is a quite unusual case, we
     just skip 512m testing and return 256m as memory size.

[...]

I get

WARNING: modpost: vmlinux.o(.text+0x132c): Section mismatch in reference from the function prom_soc_init() to the function .init.text:mt7621_memory_detect()
The function prom_soc_init() references
the function __init mt7621_memory_detect().
This is often because prom_soc_init lacks a __init
annotation or the annotation of mt7621_memory_detect is wrong.

Can you please fix this ?

Thanks, I will fix it. Having trouble reproducing the error, but I
clearly see the issue. Are you building on a MIPS target or
cross-compiling (I'm cross-compiling and no errors).

Ilya

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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

On Thu, Mar 25, 2021 at 07:45:23PM -0700, Ilya Lipnitskiy wrote:

On Thu, Mar 25, 2021 at 3:01 AM Thomas Bogendoerfer
[off-list ref] wrote:

quoted

On Tue, Mar 16, 2021 at 10:59:02PM -0700, Ilya Lipnitskiy wrote:

quoted

From: Chuanhong Guo <redacted>

mt7621 has the following memory map:
0x0-0x1c000000: lower 448m memory
0x1c000000-0x2000000: peripheral registers
0x20000000-0x2400000: higher 64m memory

detect_memory_region in arch/mips/kernel/setup.c only adds the first
memory region and isn't suitable for 512m memory detection because
it may accidentally read the memory area for peripheral registers.

This commit adds memory detection capability for mt7621:
  1. Add the highmem area when 512m is detected.
  2. Guard memcmp from accessing peripheral registers:
     This only happens when a user decided to change kernel load address
     to 256m or higher address. Since this is a quite unusual case, we
     just skip 512m testing and return 256m as memory size.

[...]

I get

WARNING: modpost: vmlinux.o(.text+0x132c): Section mismatch in reference from the function prom_soc_init() to the function .init.text:mt7621_memory_detect()
The function prom_soc_init() references
the function __init mt7621_memory_detect().
This is often because prom_soc_init lacks a __init
annotation or the annotation of mt7621_memory_detect is wrong.

Can you please fix this ?

Thanks, I will fix it. Having trouble reproducing the error, but I
clearly see the issue. Are you building on a MIPS target or
cross-compiling (I'm cross-compiling and no errors).

I'm cross compiling, I can provide you the .config, if you want.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

On Sat, Mar 27, 2021 at 2:46 AM Thomas Bogendoerfer
[off-list ref] wrote:

On Thu, Mar 25, 2021 at 07:45:23PM -0700, Ilya Lipnitskiy wrote:

quoted

On Thu, Mar 25, 2021 at 3:01 AM Thomas Bogendoerfer
[off-list ref] wrote:

quoted

On Tue, Mar 16, 2021 at 10:59:02PM -0700, Ilya Lipnitskiy wrote:

quoted

From: Chuanhong Guo <redacted>

mt7621 has the following memory map:
0x0-0x1c000000: lower 448m memory
0x1c000000-0x2000000: peripheral registers
0x20000000-0x2400000: higher 64m memory

detect_memory_region in arch/mips/kernel/setup.c only adds the first
memory region and isn't suitable for 512m memory detection because
it may accidentally read the memory area for peripheral registers.

This commit adds memory detection capability for mt7621:
  1. Add the highmem area when 512m is detected.
  2. Guard memcmp from accessing peripheral registers:
     This only happens when a user decided to change kernel load address
     to 256m or higher address. Since this is a quite unusual case, we
     just skip 512m testing and return 256m as memory size.

[...]

I get

WARNING: modpost: vmlinux.o(.text+0x132c): Section mismatch in reference from the function prom_soc_init() to the function .init.text:mt7621_memory_detect()
The function prom_soc_init() references
the function __init mt7621_memory_detect().
This is often because prom_soc_init lacks a __init
annotation or the annotation of mt7621_memory_detect is wrong.

Can you please fix this ?

Thanks, I will fix it. Having trouble reproducing the error, but I
clearly see the issue. Are you building on a MIPS target or
cross-compiling (I'm cross-compiling and no errors).

I'm cross compiling, I can provide you the .config, if you want.

Yeah, that would help. I spent quite a bit of time trying to reproduce
- tried different options with GCC 8 and GCC 10 to no avail. Maybe you
are using clang?

Ilya

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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

On Sat, Mar 27, 2021 at 09:35:43AM -0700, Ilya Lipnitskiy wrote:

On Sat, Mar 27, 2021 at 2:46 AM Thomas Bogendoerfer
[off-list ref] wrote:

quoted

On Thu, Mar 25, 2021 at 07:45:23PM -0700, Ilya Lipnitskiy wrote:

quoted

On Thu, Mar 25, 2021 at 3:01 AM Thomas Bogendoerfer
[off-list ref] wrote:

quoted

On Tue, Mar 16, 2021 at 10:59:02PM -0700, Ilya Lipnitskiy wrote:

quoted

From: Chuanhong Guo <redacted>

mt7621 has the following memory map:
0x0-0x1c000000: lower 448m memory
0x1c000000-0x2000000: peripheral registers
0x20000000-0x2400000: higher 64m memory

detect_memory_region in arch/mips/kernel/setup.c only adds the first
memory region and isn't suitable for 512m memory detection because
it may accidentally read the memory area for peripheral registers.

This commit adds memory detection capability for mt7621:
  1. Add the highmem area when 512m is detected.
  2. Guard memcmp from accessing peripheral registers:
     This only happens when a user decided to change kernel load address
     to 256m or higher address. Since this is a quite unusual case, we
     just skip 512m testing and return 256m as memory size.

[...]

I get

WARNING: modpost: vmlinux.o(.text+0x132c): Section mismatch in reference from the function prom_soc_init() to the function .init.text:mt7621_memory_detect()
The function prom_soc_init() references
the function __init mt7621_memory_detect().
This is often because prom_soc_init lacks a __init
annotation or the annotation of mt7621_memory_detect is wrong.

Can you please fix this ?

Thanks, I will fix it. Having trouble reproducing the error, but I
clearly see the issue. Are you building on a MIPS target or
cross-compiling (I'm cross-compiling and no errors).

I'm cross compiling, I can provide you the .config, if you want.

Yeah, that would help. I spent quite a bit of time trying to reproduce
- tried different options with GCC 8 and GCC 10 to no avail. Maybe you
are using clang?

no, but an older gcc (gcc version 6.1.1 20160621 (Red Hat Cross 6.1.1-2) (GCC)).
config is attached.

Thomas.


-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

On Sat, Mar 27, 2021 at 2:06 PM Thomas Bogendoerfer
[off-list ref] wrote:

On Sat, Mar 27, 2021 at 09:35:43AM -0700, Ilya Lipnitskiy wrote:

quoted

On Sat, Mar 27, 2021 at 2:46 AM Thomas Bogendoerfer
[off-list ref] wrote:

quoted

On Thu, Mar 25, 2021 at 07:45:23PM -0700, Ilya Lipnitskiy wrote:

quoted

On Thu, Mar 25, 2021 at 3:01 AM Thomas Bogendoerfer
[off-list ref] wrote:

quoted

On Tue, Mar 16, 2021 at 10:59:02PM -0700, Ilya Lipnitskiy wrote:

quoted

From: Chuanhong Guo <redacted>

mt7621 has the following memory map:
0x0-0x1c000000: lower 448m memory
0x1c000000-0x2000000: peripheral registers
0x20000000-0x2400000: higher 64m memory

detect_memory_region in arch/mips/kernel/setup.c only adds the first
memory region and isn't suitable for 512m memory detection because
it may accidentally read the memory area for peripheral registers.

This commit adds memory detection capability for mt7621:
  1. Add the highmem area when 512m is detected.
  2. Guard memcmp from accessing peripheral registers:
     This only happens when a user decided to change kernel load address
     to 256m or higher address. Since this is a quite unusual case, we
     just skip 512m testing and return 256m as memory size.

[...]

I get

WARNING: modpost: vmlinux.o(.text+0x132c): Section mismatch in reference from the function prom_soc_init() to the function .init.text:mt7621_memory_detect()
The function prom_soc_init() references
the function __init mt7621_memory_detect().
This is often because prom_soc_init lacks a __init
annotation or the annotation of mt7621_memory_detect is wrong.

Can you please fix this ?

Thanks, I will fix it. Having trouble reproducing the error, but I
clearly see the issue. Are you building on a MIPS target or
cross-compiling (I'm cross-compiling and no errors).

I'm cross compiling, I can provide you the .config, if you want.

Yeah, that would help. I spent quite a bit of time trying to reproduce
- tried different options with GCC 8 and GCC 10 to no avail. Maybe you
are using clang?

no, but an older gcc (gcc version 6.1.1 20160621 (Red Hat Cross 6.1.1-2) (GCC)).
config is attached.

Thanks, disabling CONFIG_LD_DEAD_CODE_DATA_ELIMINATION reproduced it
even with GCC 10. Fixed in
https://lore.kernel.org/linux-arm-kernel/20210327053840.471155-1-ilya.lipnitskiy@gmail.com/

- Ilya

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