Re: [PATCH net] net: dsa: mt7530: setup core clock even in TRGMII mode
From: Florian Fainelli <f.fainelli@gmail.com>
Date: 2021-03-11 03:22:08
Also in:
linux-mediatek, lkml, netdev
On 3/10/2021 5:21 PM, Ilya Lipnitskiy wrote:
A recent change to MIPS ralink reset logic made it so mt7530 actually
resets the switch on platforms such as mt7621 (where bit 2 is the reset
line for the switch). That exposed an issue where the switch would not
function properly in TRGMII mode after a reset.
Reconfigure core clock in TRGMII mode to fix the issue.
Tested on Ubiquiti ER-X (MT7621) with TRGMII mode enabled.
Fixes: 3f9ef7785a9c ("MIPS: ralink: manage low reset lines")
Signed-off-by: Ilya Lipnitskiy <redacted>Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -- Florian _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel