On 2/17/21 9:17 PM, Teresa Remmet wrote:

Hello Marek,

Hello Teresa,

Am Dienstag, den 16.02.2021, 10:38 +0100 schrieb Marek Vasut:

quoted

The board has both MACs routed out, enable the EQOS.

[...]

quoted

--- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi

@@ -38,6 +38,30 @@
  	cpu-supply = <&buck2>;
  };
  
+&eqos {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_eqos>;
+	phy-mode = "rgmii-id";
+	phy-handle = <&ethphy0>;
+	status = "okay";
+
+	mdio {
+		compatible = "snps,dwmac-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy0: ethernet-phy@1 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0x1>;
+			ti,rx-internal-delay =

<DP83867_RGMIIDCTL_1_50_NS>;
+			ti,tx-internal-delay =
<DP83867_RGMIIDCTL_1_50_NS>;
+			ti,fifo-depth =
<DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+			ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
+			enet-phy-lane-no-swap;
+		};
+	};
+};

I would prefer having this added to imx8mp-phyboard-pollux-rdk.dts.
The phy of eqos is populated on the carrier board and not on the SoM.
Boards using the same SoM should not need to patch in the imx8mp-phycore-som.dtsi
to make it fit for their selected phy.

All right, V2 is coming soon.

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