Re: [PATCH] clk: sunxi-ng: v3s: add support for variable rate audio pll output
From: Maxime Ripard <hidden>
Date: 2021-02-18 11:08:51
Also in:
linux-clk, lkml
On Thu, Feb 18, 2021 at 05:21:16PM +0800, Icenowy Zheng wrote:
于 2021年2月18日 GMT+08:00 下午5:18:39, Tobias Schramm [off-list ref] 写到:quoted
Hi Icenowy,quoted
We have introducee SDM-based accurate audio PLL on several other SoCs. Some people is quite sensitive about audio-relatedthings.quoted
While it is possible to support 24MHz * 128 / 25 / 5 = 24.576MHz without delta sigma modulation, matching 22.5792MHz is indeed not possible. I read you'd prefer me to use SDM like the other SoCs though? Shall I send a v2 utilizing SDM?Yes, I think so.
Yes I'd rather have consistency about how we deal with this across all SoCs Maxime