From: Konstantin Porotchkin <redacted>
This set of patches include various device tree additions and fixes
for Marvell Armada SoC families A3700/A7K/A8K.
These changes are ported from Marvell SDK release files.
v2:
- Rebase on top of Linus master branch 5.11-rc7
- Move AP SDHCI "slow-mode" property from AP80x DTSI to AP806 DTSI
- move AP SDHCI bus width change for A8040-DB to a separatye patch
- fix typos in pin control definitions patch
- fix patch description for pin control definitions patch
Ben Peled (2):
dts: marvell: add 2 eeprom properties to A8K DB device tree
dts: marvell: add 2 eeprom properties to A7K DB device tree
Grzegorz Jaszczyk (3):
arm64: dts: marvell: armada-3720-db: add comphy references
arm64: dts: marvell: armada-3270-espressobin: add comphy references
arm64: dts: marvell: armada-3720-db: add eeprom description
Konstantin Porotchkin (6):
fix: arm64: dts: replace wrong regulator on ap emmc
dts: mvebu: Update A8K AP806/AP807 SDHCI settings
dts: mvebu: Add pin control definitions for SDIO interafce
fix: dts: a8k: Add CP eMMC regulator and update device parameters
fix: ARM64: dts: cp110: Switch to 8-bit ECC NAND setting
arm64: dts: fix the Armada 8040 DB AP SDHCI bus width
Stefan Chulski (1):
dts: a3700: enable dma coherence
.../arm64/boot/dts/marvell/armada-3720-db.dts | 13 +++++++
.../dts/marvell/armada-3720-espressobin.dtsi | 5 +++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 ++
.../arm64/boot/dts/marvell/armada-7040-db.dts | 33 +++++++++++++++--
arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 6 ++++
.../arm64/boot/dts/marvell/armada-8040-db.dts | 35 +++++++++++++++++--
.../boot/dts/marvell/armada-8040-mcbin.dtsi | 7 +---
arch/arm64/boot/dts/marvell/armada-80x0.dtsi | 6 ++++
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 12 +++++++
arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 1 -
10 files changed, 108 insertions(+), 12 deletions(-)
--
2.17.1
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From: Konstantin Porotchkin <redacted>
Select the AP SDHCI PHY slow mode for AP806 die only (move it
from armada-ap80x.dtsi to armada-ap806.dtsi). This will allow
running AP807 based devices at HS400 speed.
Remove Ap SDHCI slow mode property from MacchiatoBin board DTS
since it is already selected on the SoC level.
Signed-off-by: Konstantin Porotchkin <redacted>
---
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi | 5 -----
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 12 ++++++++++++
arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 1 -
3 files changed, 12 insertions(+), 6 deletions(-)
From: Grzegorz Jaszczyk <redacted>
Adding phy description to pcie, sata and usb will allow appropriate drivers
to configure marvell comphy-a3700 accordingly.
Signed-off-by: Grzegorz Jaszczyk <redacted>
Signed-off-by: Konstantin Porotchkin <redacted>
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 7 +++++++
1 file changed, 7 insertions(+)
From: Konstantin Porotchkin <redacted>
All A7K/A8K boards are using NAND chip that supports
8 bit ECC strength. Using lower ECC strength is not recommended
by the flash manufacturer and may cause data corruption.
This patch changes the nand-ecc-strength value from 4 to 8.
Signed-off-by: Konstantin Porotchkin <redacted>
---
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 2 +-
arch/arm64/boot/dts/marvell/armada-8040-db.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
From: Grzegorz Jaszczyk <redacted>
On Armada 3720 board there is serial emprom M24C64 at address 0x57,
reflect it in device-tree.
Signed-off-by: Grzegorz Jaszczyk <redacted>
Signed-off-by: Konstantin Porotchkin <redacted>
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 6 ++++++
1 file changed, 6 insertions(+)
@@ -486,6 +487,7 @@#interrupt-cells=<1>;msi-parent=<&pcie0>;msi-controller;+dma-coherent;ranges=<0x8200000000xe800000000xe800000000x1000000/* Port 0 MEM */0x8100000000xe900000000xe900000000x10000>;/* Port 0 IO*/interrupt-map-mask=<0007>;
--
2.17.1
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From: Konstantin Porotchkin <redacted>
The AP SDHCI on Armada 8040 DB board utilizes 8-bit data lines.
Signed-off-by: Konstantin Porotchkin <redacted>
---
arch/arm64/boot/dts/marvell/armada-8040-db.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Russell King - ARM Linux admin <linux@armlinux.org.uk> Date: 2021-02-11 10:47:05
On Wed, Feb 10, 2021 at 04:09:39PM +0200, kostap@marvell.com wrote:
From: Konstantin Porotchkin <redacted>
Select the AP SDHCI PHY slow mode for AP806 die only (move it
from armada-ap80x.dtsi to armada-ap806.dtsi). This will allow
running AP807 based devices at HS400 speed.
Remove Ap SDHCI slow mode property from MacchiatoBin board DTS
since it is already selected on the SoC level.
Signed-off-by: Konstantin Porotchkin <redacted>
From: Russell King - ARM Linux admin <linux@armlinux.org.uk> Date: 2021-02-11 11:12:53
On Wed, Feb 10, 2021 at 04:09:38PM +0200, kostap@marvell.com wrote:
From: Konstantin Porotchkin <redacted>
Replace wrong regulator in AP0 eMMC definition on MacchiatoBIN
board with 3.3V regulator.
The MacchiatoBIN board has no 1.8V regulator connected to AP0
eMMC (ap0_sdhci0) interface.
There seems to be some variability between Macchiatobin versions
according to the schematics.
The VDDO_H supply is connected to the eMMC VCCQ pins, and is also
connected to the AP_VDDO_H pins. It is wired to the 1.8V regulator
on rev 1.1 schematics, but hard-wired to the 3.3V regulator on
rev 1.3 schematics.
This needs clarification from SolidRun before the patch can be
accepted - was VDDO_H ever wired to the 1.8V regulator on production
hardware?
--
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FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
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----------------------------------------------------------------------
On Wed, Feb 10, 2021 at 04:09:38PM +0200, kostap@marvell.com wrote:
quoted
From: Konstantin Porotchkin <redacted>
Replace wrong regulator in AP0 eMMC definition on MacchiatoBIN board
with 3.3V regulator.
The MacchiatoBIN board has no 1.8V regulator connected to AP0 eMMC
(ap0_sdhci0) interface.
There seems to be some variability between Macchiatobin versions according
to the schematics.
The VDDO_H supply is connected to the eMMC VCCQ pins, and is also
connected to the AP_VDDO_H pins. It is wired to the 1.8V regulator on rev 1.1
schematics, but hard-wired to the 3.3V regulator on rev 1.3 schematics.
This needs clarification from SolidRun before the patch can be accepted - was
VDDO_H ever wired to the 1.8V regulator on production hardware?
[KP] I will try to find a relevant contact in SolidRun for get this issue clarified.
Kosta
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3A__www.armlinux.org.uk_developer_patches_&d=DwIBAg&c=nKjWec2b6R0
mOyPaz7xtfQ&r=-
N9sN4p5NSr0JGQoQ_2UCOgAqajG99W1EbSOww0WU8o&m=7JAOlRdnL-
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FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
From: Russell King - ARM Linux admin <linux@armlinux.org.uk> Date: 2021-02-11 14:19:02
On Thu, Feb 11, 2021 at 01:57:25PM +0000, Kostya Porotchkin wrote:
quoted
----------------------------------------------------------------------
On Wed, Feb 10, 2021 at 04:09:38PM +0200, kostap@marvell.com wrote:
quoted
From: Konstantin Porotchkin <redacted>
Replace wrong regulator in AP0 eMMC definition on MacchiatoBIN board
with 3.3V regulator.
The MacchiatoBIN board has no 1.8V regulator connected to AP0 eMMC
(ap0_sdhci0) interface.
There seems to be some variability between Macchiatobin versions according
to the schematics.
The VDDO_H supply is connected to the eMMC VCCQ pins, and is also
connected to the AP_VDDO_H pins. It is wired to the 1.8V regulator on rev 1.1
schematics, but hard-wired to the 3.3V regulator on rev 1.3 schematics.
This needs clarification from SolidRun before the patch can be accepted - was
VDDO_H ever wired to the 1.8V regulator on production hardware?
[KP] I will try to find a relevant contact in SolidRun for get this issue clarified.
On Wednesday 10 February 2021 16:09:43 kostap@marvell.com wrote:
From: Grzegorz Jaszczyk <redacted>
Add "phys" entries pointing to COMPHYs to PCIe and USB3 nodes
Signed-off-by: Grzegorz Jaszczyk <redacted>
Signed-off-by: Konstantin Porotchkin <redacted>
Hello! This patch is not needed and now does nothing.
So final binary espressobin DTB files are same with and without this
patch.
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On Wednesday 10 February 2021 16:09:42 kostap@marvell.com wrote:
From: Grzegorz Jaszczyk <redacted>
Adding phy description to pcie, sata and usb will allow appropriate drivers
to configure marvell comphy-a3700 accordingly.
Signed-off-by: Grzegorz Jaszczyk <redacted>
Signed-off-by: Konstantin Porotchkin <redacted>