RE: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI settings

-----Original Message-----
From: linux-arm-kernel <redacted> On
Behalf Of Kostya Porotchkin
Sent: Wednesday, February 3, 2021 16:51
To: Russell King - ARM Linux admin <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org; Baruch Siach <baruch@tkos.co.il>;
andrew@lunn.ch; jaz@semihalf.com; gregory.clement@bootlin.com; linux-
kernel@vger.kernel.org; Nadav Haklai [off-list ref];
robh+dt@kernel.org; Stefan Chulski [off-list ref];
mw@semihalf.com; Ben Peled [off-list ref]; linux-arm-
kernel@lists.infradead.org; sebastian.hesselbarth@gmail.com
Subject: RE: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
settings

[KP] 

quoted

quoted

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Hi Konstantin,

On Wed, Feb 03 2021, kostap@marvell.com wrote:

quoted

From: Konstantin Porotchkin <redacted>

Update the settings for AP806 SDHCI interface according to
latest Xenon drivers changes.
- no need to select the PHY slow mode anymore

Why? Has anything changed since the introduction of
marvell,xenon-phy-slow- mode?

[KP] AP806 B0, AP807 and later do not need the "slow mode" set by
the

default.

quoted

The HWE-7296210 errata is not applicable to these components and
they are able to run  AP SDHCI in HS400 8-bit mode.

So what about all those people, such as me, who have A0 silicon on
their Macchiatobin boards?

You can't just go around removing DT properties like this.

[KP] So for older systems this "slow mode" parameter could be set on the
board level.
When it is set in ap80x,dtsi file it downgrades all systems to HS-SDR52, even if
they support HS400 on AP side.
MacchiatoBIN AP eMMC is connected to 3.3v regulator and has "no-1-8-v" flag
set, so it should remain in low speed anyway.

[KP] I also forgot to mention this code piece in Xenon driver:
	/* Disable HS200 on Armada AP806 */
	if (priv->hw_version == XENON_AP806)
		host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;

quoted

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