This patch series tries to remove most of the imx6 and imx7 board
specific PHY configuration via fixup, as this breaks the PHYs when
connected to switch chips or USB Ethernet MACs.
Each patch has the possibility to break boards, but contains a
recommendation to fix the problem in a more portable and future-proof
way.
regards,
Oleksij
Oleksij Rempel (7):
ARM i.MX6q: remove PHY fixup for KSZ9031
ARM i.MX6q: remove TX clock delay of ar8031_phy_fixup()
ARM i.MX6q: remove hand crafted PHY power up in ar8035_phy_fixup()
ARM i.MX6q: remove clk-out fixup for the Atheros AR8031 and AR8035
PHYs
ARM i.MX6q: remove Atheros AR8035 SmartEEE fixup
ARM: imx6sx: remove Atheros AR8031 PHY fixup
ARM: imx7d: remove Atheros AR8031 PHY fixup
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 2 +-
arch/arm/mach-imx/mach-imx6q.c | 85 -------------------------
arch/arm/mach-imx/mach-imx6sx.c | 26 --------
arch/arm/mach-imx/mach-imx7d.c | 22 -------
4 files changed, 1 insertion(+), 134 deletions(-)
--
2.30.0
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This configuration should be set over device tree.
If this patch breaks network functionality on your system, enable the
AT803X_PHY driver and set following device tree property in the PHY
node:
qca,clk-out-frequency = <125000000>;
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
arch/arm/mach-imx/mach-imx6q.c | 30 ------------------------------
1 file changed, 30 deletions(-)
In case the at803x PHY driver is activated in the kernel, the TX clock
fixup is overwritten by at803x_config_init(), in this case no additional
device tree changes are needed.
If this patch breaks your system, please enable AT803X_PHY driver and
add the following device tree property to the PHY node:
phy-mode = "rgmii-txid";
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
arch/arm/mach-imx/mach-imx6q.c | 6 ------
1 file changed, 6 deletions(-)
This fixup removes the Lpi_en bit.
If this patch breaks functionality of your board, use following device
tree properties:
ethernet-phy@X {
reg = <0xX>;
eee-broken-1000t;
eee-broken-100tx;
....
};
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
arch/arm/mach-imx/mach-imx6q.c | 21 ---------------------
1 file changed, 21 deletions(-)
The at803x_resume() handler in the at803x.c PHY driver powers up the PHY
properly, so remove this fixup.
If this patch breaks your system, enable the AT803X_PHY driver.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
arch/arm/mach-imx/mach-imx6q.c | 5 -----
1 file changed, 5 deletions(-)
Starting with:
bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
the micrel phy driver started respecting phy-mode for the KSZ9031 PHY.
At least with kernel v5.8 configuration provided by this fixup was
overwritten by the micrel driver.
This fixup was providing following configuration:
RX path: 2.58ns delay
rx -0.42 (left shift) + rx_clk +0.96ns (right shift) =
1,38 + 1,2 internal RX delay = 2.58ns
TX path: 0.96ns delay
tx (no delay) + tx_clk 0.96ns (right shift) = 0.96ns
This configuration is outside of the recommended RGMII clock skew delays
and about in the middle of: rgmii-idrx and rgmii-id
Since most embedded systems do not have enough place to introduce
significant clock skew, rgmii-id is the way to go.
In case this patch breaks network functionality on your system, build
kernel with enabled MICREL_PHY. If it is still not working then try
following device tree options:
1. Set (or change) phy-mode in DT to:
phy-mode = "rgmii-id";
This actives internal delay for both RX and TX.
1. Set (or change) phy-mode in DT to:
phy-mode = "rgmii-idrx";
This actives internal delay for RX only.
3. Use following DT properties:
phy-mode = "rgmii";
txen-skew-psec = <0>;
rxdv-skew-psec = <0>;
rxd0-skew-psec = <0>;
rxd1-skew-psec = <0>;
rxd2-skew-psec = <0>;
rxd3-skew-psec = <0>;
rxc-skew-psec = <1860>;
txc-skew-psec = <1860>;
This activates the internal delays for RX and TX, with the value as
the fixup that is removed in this patch.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 2 +-
arch/arm/mach-imx/mach-imx6q.c | 23 -----------------------
2 files changed, 1 insertion(+), 24 deletions(-)
From: Russell King - ARM Linux admin <linux@armlinux.org.uk> Date: 2021-02-03 09:30:36
On Wed, Feb 03, 2021 at 10:18:50AM +0100, Oleksij Rempel wrote:
This patch series tries to remove most of the imx6 and imx7 board
specific PHY configuration via fixup, as this breaks the PHYs when
connected to switch chips or USB Ethernet MACs.
Each patch has the possibility to break boards, but contains a
recommendation to fix the problem in a more portable and future-proof
way.
Please wait a cycle for the changes I've submitted through net-next
to be merged, so we don't end up with stuff breaking during the merge
window because these changes have been merged before the changes in
net-next.
--
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FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
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From: Russell King - ARM Linux admin <linux@armlinux.org.uk> Date: 2021-02-03 09:57:53
On Wed, Feb 03, 2021 at 10:18:55AM +0100, Oleksij Rempel wrote:
This fixup removes the Lpi_en bit.
If this patch breaks functionality of your board, use following device
tree properties:
ethernet-phy@X {
reg = <0xX>;
eee-broken-1000t;
eee-broken-100tx;
....
};
That is the historical fix for this problem, but there is a better
solution now in net-next - configuring the Tw parameter for gigabit
connections. That solves the random link drop issue when EEE is
enabled.
Support for this configuration has only recently been merged into
net-next and other trees for this merge window, so I ask that you
hold off at least this patch until the next cycle.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
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From: Philippe Schenker <hidden> Date: 2021-02-03 10:25:14
On Wed, 2021-02-03 at 10:18 +0100, Oleksij Rempel wrote:
Starting with:
bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the
KSZ9031 PHY")
the micrel phy driver started respecting phy-mode for the KSZ9031 PHY.
At least with kernel v5.8 configuration provided by this fixup was
overwritten by the micrel driver.
This fixup was providing following configuration:
RX path: 2.58ns delay
rx -0.42 (left shift) + rx_clk +0.96ns (right shift) =
1,38 + 1,2 internal RX delay = 2.58ns
TX path: 0.96ns delay
tx (no delay) + tx_clk 0.96ns (right shift) = 0.96ns
This configuration is outside of the recommended RGMII clock skew
delays
and about in the middle of: rgmii-idrx and rgmii-id
Since most embedded systems do not have enough place to introduce
significant clock skew, rgmii-id is the way to go.
In case this patch breaks network functionality on your system, build
kernel with enabled MICREL_PHY. If it is still not working then try
following device tree options:
1. Set (or change) phy-mode in DT to:
phy-mode = "rgmii-id";
This actives internal delay for both RX and TX.
1. Set (or change) phy-mode in DT to:
phy-mode = "rgmii-idrx";
This actives internal delay for RX only.
3. Use following DT properties:
phy-mode = "rgmii";
txen-skew-psec = <0>;
rxdv-skew-psec = <0>;
rxd0-skew-psec = <0>;
rxd1-skew-psec = <0>;
rxd2-skew-psec = <0>;
rxd3-skew-psec = <0>;
rxc-skew-psec = <1860>;
txc-skew-psec = <1860>;
This activates the internal delays for RX and TX, with the value as
the fixup that is removed in this patch.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
For Toradex Boards:
Acked-by: Philippe Schenker <redacted>
On Wed, Feb 03, 2021 at 09:56:28AM +0000, Russell King - ARM Linux admin wrote:
On Wed, Feb 03, 2021 at 10:18:55AM +0100, Oleksij Rempel wrote:
quoted
This fixup removes the Lpi_en bit.
If this patch breaks functionality of your board, use following device
tree properties:
ethernet-phy@X {
reg = <0xX>;
eee-broken-1000t;
eee-broken-100tx;
....
};
That is the historical fix for this problem, but there is a better
solution now in net-next - configuring the Tw parameter for gigabit
connections. That solves the random link drop issue when EEE is
enabled.
Do you mean this properties?
qca,smarteee-tw-us-1g
qca,smarteee-tw-us-100m
Do you have some recommendations, which values can be here used? Are
they same for all MACs? Or, can we calculate this values automatically?
Beside, I have seen this patch: "ARM: dts: imx6qdl-sr-som: fix some
cubox-i platforms"
I had similar issue and it was triggered by the boot loader, which
enabled 60 Ohm on-die termination. The fix was to remove this lines in
the boot loader: wm 32 0x020e07ac 0x00000200 /* 60 Ohm ODT */
Support for this configuration has only recently been merged into
net-next and other trees for this merge window, so I ask that you
hold off at least this patch until the next cycle.
ok.
Regards,
Oleksij
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From: Russell King - ARM Linux admin <linux@armlinux.org.uk> Date: 2021-02-08 14:44:53
On Mon, Feb 08, 2021 at 10:20:38AM +0100, Oleksij Rempel wrote:
On Wed, Feb 03, 2021 at 09:56:28AM +0000, Russell King - ARM Linux admin wrote:
quoted
That is the historical fix for this problem, but there is a better
solution now in net-next - configuring the Tw parameter for gigabit
connections. That solves the random link drop issue when EEE is
enabled.
Do you mean this properties?
qca,smarteee-tw-us-1g
qca,smarteee-tw-us-100m
Do you have some recommendations, which values can be here used? Are
they same for all MACs? Or, can we calculate this values automatically?
I don't think there's a way to "calculate" them.
The AR8035 default is 17us for 1G and 23us for 100M. Increasing the
1G Tw to 26us or 27us fixes it on several different Solidrun platforms
(iMX6 Hummingboards and Cubox-i, and LX2160A based). The boards all
have differing layouts, so I don't think it's layout or SoC specific
(which is good news.)
These figures have been arrived at by repetitive long-term testing and
observing whether there are sporadic link drops over these platforms.
Beside, I have seen this patch: "ARM: dts: imx6qdl-sr-som: fix some
cubox-i platforms"
That's for a different problem: moving these settings to DT broke
some Cubox-i platforms because of the weird ways that the AR8035
configures the address bits, using the LED pin. Tying a LED to the
LED pin is not sufficient to guarantee that a board always configures
the PHY to a particular address, so it can appear on address 0 or 4
depending on noise, temperature, supply voltage, and PHY chip
thresholds.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
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