Thread (7 messages) flat view 7 messages, 2 authors, 2021-01-11

Re: [PATCH 0/5] Add R5F nodes on TI K3 J7200 SoCs

From: Nishanth Menon <nm@ti.com>
Date: 2021-01-11 14:18:40
Also in: linux-devicetree

On 12:39-20210107, Suman Anna wrote:
Hi Nishanth,

The TI K3 R5F remoteproc driver support for the R5F instances on J7200
SoCs is merged in 5.11-rc1, and this series adds the follow-on base
dt nodes for the R5F remote processors on TI K3 J7200 SoCs. The R5F
nodes on J7200 slightly differ from those on J721E SoCs highlighted
in the driver changes [1]. Additional memory nodes were also added to
boot these processors successfully on applicable TI K3 J7200 EVM boards.
The series uses previously merged mailbox nodes.

The patches follow the same style to similar patches added for J721E
SoCs [2]. Patches are on top of the latest v5.11-rc2 tag.

I have validated the IPC functionality using System Firmware
v2020.07-rc3 and corresponding IPC example firmwares.

regards
Suman

[1] https://patchwork.kernel.org/project/linux-arm-kernel/cover/20201119010531.21083-1-s-anna@ti.com/
[2] https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=372749&state=%2A&archive=both

Suman Anna (5):
  arm64: dts: ti: k3-j7200-mcu: Add MCU domain R5F cluster node
  arm64: dts: ti: k3-j7200-main: Add MAIN domain R5F cluster node
	^^ Please squash these two.
  arm64: dts: ti: k3-j7200-som-p0: Add mailboxes to R5Fs
  arm64: dts: ti: k3-j7200-som-p0: Add DDR carveout memory nodes for
    R5Fs
  arm64: dts: ti: k3-j7200-som-p0: Reserve memory for IPC between RTOS
    cores
The DDR carveouts and reservations could be a single patch. These seem
trivial enough


-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

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