Re: [PATCH -stable] drm/amdgpu/display: drop DCN support for aarch64
From: Greg KH <hidden>
Date: 2021-01-21 12:47:40
Also in:
amd-gfx, stable
On Thu, Jan 21, 2021 at 10:20:40AM +0100, Ard Biesheuvel wrote:
From: Alex Deucher <alexander.deucher@amd.com> commit c241ed2f0ea549c18cff62a3708b43846b84dae3 upstream.quoted
From Ard:"Simply disabling -mgeneral-regs-only left and right is risky, given that the standard AArch64 ABI permits the use of FP/SIMD registers anywhere, and GCC is known to use SIMD registers for spilling, and may invent other uses of the FP/SIMD register file that have nothing to do with the floating point code in question. Note that putting kernel_neon_begin() and kernel_neon_end() around the code that does use FP is not sufficient here, the problem is in all the other code that may be emitted with references to SIMD registers in it. So the only way to do this properly is to put all floating point code in a separate compilation unit, and only compile that unit with -mgeneral-regs-only." Disable support until the code can be properly refactored to support this properly on aarch64. Acked-by: Will Deacon <will@kernel.org> Reported-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> [ardb: backport to v5.10 by reverting c38d444e44badc55 instead] Acked-by: Alex Deucher <alexander.deucher@amd.com> # v5.10 backport Signed-off-by: Ard Biesheuvel <ardb@kernel.org> --- The original commit does not apply cleanly to v5.10, as it reverts a combination of patches, some of which are not present in v5.10. This patch is a straight revert of c38d444e44badc55, which is the only change that needs to be backed out from v5.10, and amounts to the same thing as the original mainline commit.
Now queued up, thanks. greg k-h _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel