On Thu, Jan 21, 2021 at 10:08:17AM +0000, Christoph Lameter wrote:

On Wed, 20 Jan 2021, Sudarshan Rajagopalan wrote:

quoted

But there are other problems in reducing SECTION_SIZE_BIT. Reducing it by too
much would over populate /sys/devices/system/memory/ and also consume too many
page->flags bits in the !vmemmap case. Also section size needs to be multiple
of 128MB to have PMD based vmemmap mapping with CONFIG_ARM64_4K_PAGES.

There is also the issue of requiring more space in the TLB cache with
smaller page sizes. Or does ARM resolve these into smaller TLB entries
anyways (going on my x86 kwon how here)? Anyways if there are only a few
TLB entries then the effect could
be significant.

There is indeed more TLB pressure with smaller page sizes but this patch
doesn't change this.

-- 
Catalin

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