From: Chen-Yu Tsai <redacted>
Hi everyone,
This is v2 of my ROCK Pi E support series.
Changes since v1:
- Picked up Rob's Ack for the binding
- Dropped comment about LED color
- Dropped max-frequency from emmc node
- Changed pingroup name from "ethernet-phy" to "ephy" to avoid DT binding
check failure
- Dropped cap-mmc-highspeed from sdmmc node
- Fixed regulator properties to have consistent ordering
- Added adc-key for recovery button
- Sorted header files
This series adds support for the Radxa ROCK Pi E. This is a router
oriented SBC based on Rockchip's RK3328 SoC. As the official wiki page
puts it, "E for Ethernets".
It features the RK3328 SoC, gigabit and fast Ethernet RJ45 ports, both
directly served by Ethernet controllers in the SoC, a USB 3.0 host port,
a power-only USB type-C port, a 3.5mm headphone jack for audio output,
two LEDs, a 40-pin Raspberry Pi style GPIO header, and optional WiFi+BT
and PoE header.
The board comes in multiple configurations, differing in the amount of
onboard RAM, the level of WiFi+BT (none, 802.11n 2.4GHz, or 802.11ac
2.4 GHz & 5 GHz), and whether PoE is supported or not. These variants
can all share the same device tree. Currently, the 802.11ac chip
lacks an in-kernel driver.
The USB 2.0 OTG controller is available on the 40-pin header. This is
not enabled in the device tree, since it is possible to use it in a
host-only configuration, or in OTG mode with an extra pin from the
header as the ID pin.
The device tree is based on the one of the Rock64, with various parts
modified to match the ROCK Pi E, and some parts updated to newer styles,
such as the gmac2io node's mdio sub-node.
Patch 1 adds the clock_in_out property to the gmac2phy node. This would
always have the same setting for gmac2phy, which uses an integrated PHY
in RMII mode. Having this set by default makes enabling gmac2phy at the
board level simpler.
Patch 2 adds a compatible string for this board to the list of Rockchip
based devices.
Patch 3 adds a device tree file for this board. This is based on the
one for the Rock64, with many modifications to adapt it to the new
board, as well as style updates.
Please have a look.
Regards
ChenYu
Chen-Yu Tsai (3):
arm64: dts: rockchip: rk3328: Add clock_in_out property to gmac2phy
node
dt-bindings: arm: rockchip: Add Radxa ROCK Pi E
arm64: dts: rockchip: rk3328: Add Radxa ROCK Pi E
.../devicetree/bindings/arm/rockchip.yaml | 5 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3328-rock-pi-e.dts | 382 ++++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1 +
4 files changed, 389 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts
--
2.29.2
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From: Chen-Yu Tsai <redacted>
Radxa ROCK Pi E is a router oriented SBC based on Rockchip's RK3328 SoC.
As the official wiki page puts it, "E for Ethernets".
It features the RK3328 SoC, gigabit and fast Ethernet RJ45 ports, both
directly served by Ethernet controllers in the SoC, a USB 3.0 host port,
a power-only USB type-C port, a 3.5mm headphone jack for audio output,
two LEDs, a 40-pin Raspberry Pi style GPIO header, and optional WiFi+BT
and PoE header.
The board comes in multiple configurations, differing in the amount of
onboard RAM, the level of WiFi+BT (none, 802.11n 2.4GHz, or 802.11ac
2.4 GHz & 5 GHz), and whether PoE is supported or not. These variants
can all share the same device tree.
The USB 2.0 OTG controller is available on the 40-pin header. This is
not enabled in the device tree, since it is possible to use it in a
host-only configuration, or in OTG mode with an extra pin from the
header as the ID pin.
The device tree is based on the one of the Rock64, with various parts
modified to match the ROCK Pi E, and some parts updated to newer styles,
such as the gmac2io node's mdio sub-node.
Add a compatible string for the new board.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chen-Yu Tsai <redacted>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
@@ -468,6 +468,11 @@ properties:-const:radxa,rockpi4-const:rockchip,rk3399+-description:Radxa ROCK Pi E+items:+-const:radxa,rockpi-e+-const:rockchip,rk3328+-description:Radxa ROCK Pi N8items:-const:radxa,rockpi-n8
--
2.29.2
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From: Chen-Yu Tsai <redacted>
Radxa ROCK Pi E is a router oriented SBC based on Rockchip's RK3328 SoC.
As the official wiki page puts it, "E for Ethernets".
It features the RK3328 SoC, gigabit and fast Ethernet RJ45 ports, both
directly served by Ethernet controllers in the SoC, a USB 3.0 host port,
a power-only USB type-C port, a 3.5mm headphone jack for audio output,
two LEDs, a 40-pin Raspberry Pi style GPIO header, and optional WiFi+BT
and PoE header.
The board comes in multiple configurations, differing in the amount of
onboard RAM, the level of WiFi+BT (none, 802.11n 2.4GHz, or 802.11ac
2.4 GHz & 5 GHz), and whether PoE is supported or not. These variants
can all share the same device tree.
The USB 2.0 OTG controller is available on the 40-pin header. This is
not enabled in the device tree, since it is possible to use it in a
host-only configuration, or in OTG mode with an extra pin from the
header as the ID pin.
The device tree is based on the one of the Rock64, with various parts
modified to match the ROCK Pi E, and some parts updated to newer styles,
such as the gmac2io node's mdio sub-node.
Add a new device tree file for the new board.
The voltages for the adc-keys were selected to have some tolerances for
resistor variances and the ADC itself also causing voltage drops. Since
the recover button is the only button on the adc line, this should not
cause any issues.
Signed-off-by: Chen-Yu Tsai <redacted>
---
Changes since v1:
- Dropped comment about LED color
- Dropped max-frequency from emmc node
- Changed pingroup name from "ethernet-phy" to "ephy"
to avoid DT binding check failure
- Dropped cap-mmc-highspeed from sdmmc node
- Fixed regulator properties to have consistent ordering
- Added adc-key for recovery button
- Sorted header files
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3328-rock-pi-e.dts | 382 ++++++++++++++++++
2 files changed, 383 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts
@@ -0,0 +1,382 @@+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)+/*+*(C)Copyright2020Chen-YuTsai<wens@csie.org>+*+*Basedon./rk3328-rock64.dts,whichis+*+*Copyright(c)2017PINE64+*/++/dts-v1/;++#include<dt-bindings/gpio/gpio.h>+#include<dt-bindings/input/input.h>+#include<dt-bindings/leds/common.h>+#include<dt-bindings/pinctrl/rockchip.h>++#include"rk3328.dtsi"++/{+model="Radxa ROCK Pi E";+compatible="radxa,rockpi-e","rockchip,rk3328";++chosen{+stdout-path="serial2:1500000n8";+};++adc-keys{+compatible="adc-keys";+io-channels=<&saradc0>;+io-channel-names="buttons";+keyup-threshold-microvolt=<1750000>;++/* This button is unpopulated out of the factory. */+button-recovery{+label="Recovery";+linux,code=<KEY_VENDOR>;+press-threshold-microvolt=<10000>;+};+};++gmac_clkin:external-gmac-clock{+compatible="fixed-clock";+clock-frequency=<125000000>;+clock-output-names="gmac_clkin";+#clock-cells=<0>;+};++leds{+compatible="gpio-leds";+pinctrl-0=<&led_pin>;+pinctrl-names="default";++led-0{+color=<LED_COLOR_ID_BLUE>;+gpios=<&gpio3RK_PA5GPIO_ACTIVE_LOW>;+linux,default-trigger="heartbeat";+};+};++vcc_sd:sdmmc-regulator{+compatible="regulator-fixed";+gpio=<&gpio0RK_PD6GPIO_ACTIVE_LOW>;+pinctrl-names="default";+pinctrl-0=<&sdmmc0m1_pin>;+regulator-name="vcc_sd";+regulator-boot-on;+vin-supply=<&vcc_io>;+};++vcc_host_5v:vcc-host-5v-regulator{+compatible="regulator-fixed";+gpio=<&gpio3RK_PA7GPIO_ACTIVE_HIGH>;+pinctrl-names="default";+pinctrl-0=<&usb30_host_drv>;+enable-active-high;+regulator-name="vcc_host_5v";+regulator-always-on;+regulator-boot-on;+vin-supply=<&vcc_sys>;+};++vcc_sys:vcc-sys{+compatible="regulator-fixed";+regulator-name="vcc_sys";+regulator-always-on;+regulator-boot-on;+regulator-min-microvolt=<5000000>;+regulator-max-microvolt=<5000000>;+};++vcc_wifi:vcc-wifi-regulator{+compatible="regulator-fixed";+gpio=<&gpio0RK_PA0GPIO_ACTIVE_LOW>;+pinctrl-names="default";+pinctrl-0=<&wifi_en>;+regulator-name="vcc_wifi";+regulator-always-on;+regulator-boot-on;+vin-supply=<&vcc_io>;+};+};++&analog_sound{+status="okay";+};++&codec{+status="okay";+};++&cpu0{+cpu-supply=<&vdd_arm>;+};++&cpu1{+cpu-supply=<&vdd_arm>;+};++&cpu2{+cpu-supply=<&vdd_arm>;+};++&cpu3{+cpu-supply=<&vdd_arm>;+};++&emmc{+bus-width=<8>;+cap-mmc-highspeed;+mmc-ddr-1_8v;+mmc-hs200-1_8v;+non-removable;+pinctrl-names="default";+pinctrl-0=<&emmc_clk>,<&emmc_cmd>,<&emmc_bus8>;+vmmc-supply=<&vcc_io>;+vqmmc-supply=<&vcc18_emmc>;+status="okay";+};++&gmac2io{+assigned-clocks=<&cruSCLK_MAC2IO>,<&cruSCLK_MAC2IO_EXT>;+assigned-clock-parents=<&gmac_clkin>,<&gmac_clkin>;+clock_in_out="input";+phy-handle=<&rtl8211e>;+phy-mode="rgmii";+phy-supply=<&vcc_io>;+pinctrl-names="default";+pinctrl-0=<&rgmiim1_pins>;+snps,aal;+snps,rxpbl=<0x4>;+snps,txpbl=<0x4>;+tx_delay=<0x26>;+rx_delay=<0x11>;+status="okay";++mdio{+compatible="snps,dwmac-mdio";+#address-cells=<1>;+#size-cells=<0>;++rtl8211e:ethernet-phy@1{+reg=<1>;+pinctrl-0=<ð_phy_int_pin>,<ð_phy_reset_pin>;+pinctrl-names="default";+interrupt-parent=<&gpio1>;+interrupts=<24IRQ_TYPE_LEVEL_LOW>;+reset-assert-us=<10000>;+reset-deassert-us=<50000>;+reset-gpios=<&gpio1RK_PC2GPIO_ACTIVE_LOW>;+};+};+};++&gmac2phy{+pinctrl-names="default";+pinctrl-0=<&fephyled_linkm1>,<&fephyled_rxm1>;+status="okay";+};++&i2c1{+status="okay";++rk805:pmic@18{+compatible="rockchip,rk805";+reg=<0x18>;+interrupt-parent=<&gpio2>;+interrupts=<6IRQ_TYPE_LEVEL_LOW>;+#clock-cells=<1>;+clock-output-names="xin32k","rk805-clkout2";+gpio-controller;+#gpio-cells=<2>;+pinctrl-names="default";+pinctrl-0=<&pmic_int_l>;+rockchip,system-power-controller;+wakeup-source;++vcc1-supply=<&vcc_sys>;+vcc2-supply=<&vcc_sys>;+vcc3-supply=<&vcc_sys>;+vcc4-supply=<&vcc_sys>;+vcc5-supply=<&vcc_io>;+vcc6-supply=<&vcc_sys>;++regulators{+vdd_log:DCDC_REG1{+regulator-name="vdd_log";+regulator-always-on;+regulator-boot-on;+regulator-min-microvolt=<712500>;+regulator-max-microvolt=<1450000>;+regulator-ramp-delay=<12500>;++regulator-state-mem{+regulator-on-in-suspend;+regulator-suspend-microvolt=<1000000>;+};+};++vdd_arm:DCDC_REG2{+regulator-name="vdd_arm";+regulator-always-on;+regulator-boot-on;+regulator-min-microvolt=<712500>;+regulator-max-microvolt=<1450000>;+regulator-ramp-delay=<12500>;++regulator-state-mem{+regulator-on-in-suspend;+regulator-suspend-microvolt=<950000>;+};+};++vcc_ddr:DCDC_REG3{+regulator-name="vcc_ddr";+regulator-always-on;+regulator-boot-on;++regulator-state-mem{+regulator-on-in-suspend;+};+};++vcc_io:DCDC_REG4{+regulator-name="vcc_io";+regulator-always-on;+regulator-boot-on;+regulator-min-microvolt=<3300000>;+regulator-max-microvolt=<3300000>;++regulator-state-mem{+regulator-on-in-suspend;+regulator-suspend-microvolt=<3300000>;+};+};++vcc_18:LDO_REG1{+regulator-name="vcc_18";+regulator-always-on;+regulator-boot-on;+regulator-min-microvolt=<1800000>;+regulator-max-microvolt=<1800000>;++regulator-state-mem{+regulator-on-in-suspend;+regulator-suspend-microvolt=<1800000>;+};+};++vcc18_emmc:LDO_REG2{+regulator-name="vcc18_emmc";+regulator-always-on;+regulator-boot-on;+regulator-min-microvolt=<1800000>;+regulator-max-microvolt=<1800000>;++regulator-state-mem{+regulator-on-in-suspend;+regulator-suspend-microvolt=<1800000>;+};+};++vdd_10:LDO_REG3{+regulator-name="vdd_10";+regulator-always-on;+regulator-boot-on;+regulator-min-microvolt=<1000000>;+regulator-max-microvolt=<1000000>;++regulator-state-mem{+regulator-on-in-suspend;+regulator-suspend-microvolt=<1000000>;+};+};+};+};+};++&i2s1{+status="okay";+};++&io_domains{+pmuio-supply=<&vcc_io>;+vccio1-supply=<&vcc_io>;+vccio2-supply=<&vcc18_emmc>;+vccio3-supply=<&vcc_io>;+vccio4-supply=<&vcc_io>;+vccio5-supply=<&vcc_io>;+vccio6-supply=<&vcc_io>;+status="okay";+};++&pinctrl{+ephy{+eth_phy_int_pin:eth-phy-int-pin{+rockchip,pins=<1RK_PD0RK_FUNC_GPIO&pcfg_pull_down>;+};++eth_phy_reset_pin:eth-phy-reset-pin{+rockchip,pins=<1RK_PC2RK_FUNC_GPIO&pcfg_pull_down>;+};+};++leds{+led_pin:led-pin{+rockchip,pins=<3RK_PA5RK_FUNC_GPIO&pcfg_pull_none>;+};+};++pmic{+pmic_int_l:pmic-int-l{+rockchip,pins=<2RK_PA6RK_FUNC_GPIO&pcfg_pull_up>;+};+};++usb3{+usb30_host_drv:usb30-host-drv{+rockchip,pins=<3RK_PA7RK_FUNC_GPIO&pcfg_pull_none>;+};+};++wifi{+wifi_en:wifi-en{+rockchip,pins=<0RK_PA0RK_FUNC_GPIO&pcfg_pull_none>;+};+};+};++&sdmmc{+bus-width=<4>;+cap-sd-highspeed;+disable-wp;+pinctrl-names="default";+pinctrl-0=<&sdmmc0_clk>,<&sdmmc0_cmd>,<&sdmmc0_dectn>,<&sdmmc0_bus4>;+vmmc-supply=<&vcc_sd>;+status="okay";+};++&saradc{+vref-supply=<&vcc_18>;+status="okay";+};++&tsadc{+status="okay";+};++&u2phy{+status="okay";+};++&u2phy_host{+status="okay";+};++&uart2{+status="okay";+};++&usb_host0_ehci{+status="okay";+};
--
2.29.2
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From: Chen-Yu Tsai <redacted>
The gmac2phy is integrated with the PHY within the SoC. Any properties
related to this integration can be included in the .dtsi file, instead
of having board dts files specify them separately.
Add the clock_in_out property to specify the direction of the PHY clock.
This is the minimum required to have gmac2phy working on Linux. Other
examples include assigned-clocks, assigned-clock-rates, and
assigned-clock-parents properties, but the hardware default plus the
implementation requesting the appropriate clock rate also works.
Fixes: 9c4cc910fe28 ("ARM64: dts: rockchip: Add gmac2phy node support for rk3328")
Signed-off-by: Chen-Yu Tsai <redacted>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1 +
1 file changed, 1 insertion(+)
On Sun, 17 Jan 2021 18:07:07 +0800, Chen-Yu Tsai wrote:
This is v2 of my ROCK Pi E support series.
Changes since v1:
- Picked up Rob's Ack for the binding
- Dropped comment about LED color
- Dropped max-frequency from emmc node
- Changed pingroup name from "ethernet-phy" to "ephy" to avoid DT binding
check failure
- Dropped cap-mmc-highspeed from sdmmc node
- Fixed regulator properties to have consistent ordering
- Added adc-key for recovery button
- Sorted header files
[...]
Applied, thanks!
[1/3] arm64: dts: rockchip: rk3328: Add clock_in_out property to gmac2phy node
commit: c6433083f5930fdf52ad47c8c0459719c810dc89
[2/3] dt-bindings: arm: rockchip: Add Radxa ROCK Pi E
commit: 31b8e8592f6663c0937d1408f1fd6ed566fbde5c
[3/3] arm64: dts: rockchip: rk3328: Add Radxa ROCK Pi E
commit: b918e81f2145967f0cadfe9ede38c69c1796fe09
Best regards,
--
Heiko Stuebner [off-list ref]
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