[PATCH v2 3/4] arm64: dts: allwinner: h6: Add RSB controller node
From: Samuel Holland <samuel@sholland.org>
Date: 2021-01-03 10:01:35
Also in:
linux-clk, linux-devicetree, linux-gpio, lkml
Subsystem:
arm/allwinner sunxi soc support, the rest · Maintainers:
Chen-Yu Tsai, Jernej Skrabec, Samuel Holland, Linus Torvalds
The H6 SoC contains an undocumented but fully functional RSB controller. Add support for it. The MMIO register address matches other SoCs of the same generation, and the IRQ matches a hole in the documented IRQ list. Signed-off-by: Samuel Holland <samuel@sholland.org> --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 8a62a9fbe347..b043beea8e6e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi@@ -949,6 +949,11 @@ r_ir_rx_pin: r-ir-rx-pin { pins = "PL9"; function = "s_cir_rx"; }; + + r_rsb_pins: r-rsb-pins { + pins = "PL0", "PL1"; + function = "s_rsb"; + }; }; r_ir: ir@7040000 {
@@ -979,6 +984,20 @@ r_i2c: i2c@7081400 { #size-cells = <0>; }; + r_rsb: rsb@7083000 { + compatible = "allwinner,sun8i-a23-rsb"; + reg = <0x07083000 0x400>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu CLK_R_APB2_RSB>; + clock-frequency = <3000000>; + resets = <&r_ccu RST_R_APB2_RSB>; + pinctrl-names = "default"; + pinctrl-0 = <&r_rsb_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + ths: thermal-sensor@5070400 { compatible = "allwinner,sun50i-h6-ths"; reg = <0x05070400 0x100>;
--
2.26.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel