On Thu, Nov 26, 2020 at 04:19:55PM +0000, Marc Zyngier wrote:

On 2020-11-26 15:57, Matthew Wilcox wrote:

quoted

On Thu, Nov 26, 2020 at 03:53:58PM +0000, David Brazdil wrote:

quoted

The hypervisor starts trapping host SMCs and intercepting host's PSCI
CPU_ON/SUSPEND calls. It replaces the host's entry point with its own,
initializes the EL2 state of the new CPU and installs the nVHE hyp
vector
before ERETing to the host's entry point.

I hate CPU people.  This is complete gibberish to anyone who doesn't
already have their head deep in ... whatever you're talking about.

What I hate the most is people having a go at other people because they
don't understand what is being discussed. Who is at fault there?

The person who wrote an explanation that doesn't actually explain
anything?  If you're sending mail to a bunch of mailing lists which
aren't already familiar with what you're trying to do, the onus is on
you to do more explanation.

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