On Wed, 25 Nov 2020 12:30:09 +0530, Sai Prakash Ranjan wrote:
Some hardware variants contain a system cache or the last level
cache(llc). This cache is typically a large block which is shared
by multiple clients on the SOC. GPU uses the system cache to cache
both the GPU data buffers(like textures) as well the SMMU pagetables.
This helps with improved render performance as well as lower power
consumption by reducing the bus traffic to the system memory.
[...]
Applied the SMMU bits to arm64 (for-next/iommu/arm-smmu), thanks!
[3/9] iommu/arm-smmu: Add support for pagetable config domain attribute
https://git.kernel.org/arm64/c/c99110a865a3
[4/9] iommu/arm-smmu: Move non-strict mode to use io_pgtable_domain_attr
https://git.kernel.org/arm64/c/12bc36793fd6
[8/9] iommu: arm-smmu-impl: Use table to list QCOM implementations
https://git.kernel.org/arm64/c/00597f9ff5ec
[9/9] iommu: arm-smmu-impl: Add a space before open parenthesis
https://git.kernel.org/arm64/c/7f575a6087f4
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
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