Re: [PATCH v2 2/2] ARM: dts: BCM5301X: Linksys EA9500 make use of pinctrl

On Wed, Nov 04, 2020 at 12:37:45PM -0800, Florian Fainelli wrote:

On 11/4/2020 12:29 PM, Vivek Unune wrote:

quoted

Now that we have a pin controller, use that instead of manuplating the
mdio/mdc pins directly. i.e. we no longer require the mdio-mii-mux

I am a bit confused here as I thought the mux was intended to
dynamically switch the pins in order to support both internal and
external MDIO devices but given the register ranges that were used,
these were actually the pinmux configuration for the MDC and MDIO pins.

This does not break USB and/or PCIe PHY communication does it?

Hi Florian,

The external and internal MDIO logic is controlled by mdio-bus-mux.
Which controls the BIT(9) of the mdio register. This stays.

The removal of mdio-mii-mux and it's replacement with usage of
pinctrl doesn't affect USB3 or PCIe. See below USB3 detection.

[ 4295.450118] usb 1-1: new high-speed USB device number 2 using ehci-platform
[ 4295.690183] usb 4-1: new SuperSpeed Gen 1 USB device number 2 using xhci-hcd
[ 4295.721888] usb-storage 4-1:1.0: USB Mass Storage device detected
[ 4295.728349] scsi host0: usb-storage 4-1:1.0
[ 4296.811047] scsi 0:0:0:0: Direct-Access     SanDisk  Ultra Fit        1.00 PQ: 0 ANSI: 6
[ 4296.821159] sd 0:0:0:0: [sda] 60063744 512-byte logical blocks: (30.8 GB/28.6 GiB)
[ 4296.829667] sd 0:0:0:0: [sda] Write Protect is off
[ 4296.834502] sd 0:0:0:0: [sda] Mode Sense: 43 00 00 00
[ 4296.834864] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
[ 4296.852604] GPT:Primary header thinks Alt. header is not at the end of the disk.
[ 4296.860079] GPT:1540387 != 60063743
[ 4296.863586] GPT:Alternate GPT header not at the end of the disk.
[ 4296.869600] GPT:1540387 != 60063743
[ 4296.873090] GPT: Use GNU Parted to correct GPT errors.
[ 4296.878266]  sda: sda1 sda2
[ 4296.884416] sd 0:0:0:0: [sda] Attached SCSI removable disk


Thanks,

Vivek

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