Thread (24 messages) 24 messages, 3 authors, 2020-10-01

Re: [PATCH 03/13] arm64: head.S: always initialize PSTATE

flat view

From: Mark Rutland <mark.rutland@arm.com>
Date: 2020-10-01 11:03:05

On Wed, Sep 30, 2020 at 05:09:47PM +0100, James Morse wrote:
Hi Mark,

On 25/09/2020 17:07, Mark Rutland wrote:
quoted
As with SCTLR_ELx and other control registers, some PSTATE bits are
UNKNOWN out-of-reset, and we may not be able to rely on hardware of
firmware
(hardware or firmware)
Whoops; fixed!

[...]
quoted
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 9bb07be45249a..b8ee9a62c9b61 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -494,17 +494,22 @@ EXPORT_SYMBOL(kimage_vaddr)
  * booted in EL1 or EL2 respectively.
  */
 SYM_FUNC_START(init_kernel_el)
-	msr	SPsel, #1			// We want to use SP_EL{1,2}
 	mrs	x0, CurrentEL
 	cmp	x0, #CurrentEL_EL2
-	b.eq	1f
+	b.eq	init_el2
+
+SYM_INNER_LABEL(init_el1, SYM_L_LOCAL)
 	mov_q	x0, INIT_SCTLR_EL1_MMU_OFF
 	msr	sctlr_el1, x0
-	mov	w0, #BOOT_CPU_MODE_EL1		// This cpu booted in EL1
quoted
 	isb
Could you add a comment covering why this ISB isn't rolled into the ERET?
I'm guessing its in case SCTLR_EL1 previously had v8.5s EOS 'Exception Exit is Context
Synchronizing' clear.
Yup, and I had a vague fear that we may gain new bits in future along
similar lines.

I'll add a note to the top of init_kernel_el, since it applies to all of
the ERET cases. I'll also add a (pessimistic) ISB to the
install_el2_stub return path to make this clear/consistent.

Thanks,
Mark.

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