Re: [PATCH v3 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek
From: Will Deacon <will@kernel.org>
Date: 2020-10-23 11:21:59
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linux-devicetree, linux-iommu, linux-mediatek, lkml
On Wed, Sep 30, 2020 at 03:06:34PM +0800, Yong Wu wrote:
quoted hunk ↗ jump to hunk
The standard input iova bits is 32. MediaTek quad the lvl1 pagetable (4 * lvl1). No change for lvl2 pagetable. Then the iova bits can reach 34bit. Signed-off-by: Yong Wu <yong.wu@mediatek.com> --- drivers/iommu/io-pgtable-arm-v7s.c | 13 ++++++++++--- drivers/iommu/mtk_iommu.c | 2 +- 2 files changed, 11 insertions(+), 4 deletions(-)diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c index 8362fdf76657..306bae2755ed 100644 --- a/drivers/iommu/io-pgtable-arm-v7s.c +++ b/drivers/iommu/io-pgtable-arm-v7s.c@@ -50,10 +50,17 @@ */ #define ARM_V7S_ADDR_BITS 32
If we rename this to _ARM_V7S_ADDR_BITS can we then have ARM_V7S_ADDR_BITS take a cfg parameter and move the arm_v7s_is_mtk_enabled() check in there? Same for _ARM_V7S_LVL_BITS. That would avoid scattering arm_v7s_is_mtk_enabled() into all the users. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel