Hi Lars,

I'm overall mostly happy with the latest posting (not the one I respond to here)

On Thu, Oct 8, 2020 at 12:57 PM Lars Povlsen [off-list ref] wrote:

quoted

On Tue, Oct 6, 2020 at 4:25 PM Lars Povlsen [off-list ref] wrote:

quoted

quoted

+       gc->of_xlate            = microchip_sgpio_of_xlate;
+       gc->of_gpio_n_cells     = 3;

So I'm sceptical to this.

Why can't you just use the pin index in cell 0 directly
and avoid cell 1?

You scepticism has surfaced before :-). The (now) 2 indices relates to
how the hardware address signals.

Each signal/pin is addressed by port, bit number and direction. We now
have the direction encoded in the bank/phandle.

I'm sorry but I just don't get it, I suppose. To me it is pretty
straight-forward
that the cells indicate the pin and then the flags. I do understand you
need the port at all, since this is implicit from the reg property
of the DT node. Are these two different things?

Yours,
Linus Walleij

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