Thread (9 messages) 9 messages, 3 authors, 2020-10-02
STALE2085d
Revisions (7)
  1. v6 [diff vs current]
  2. v7 [diff vs current]
  3. v8 [diff vs current]
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  5. v10 [diff vs current]
  6. v11 [diff vs current]
  7. v12 current

[PATCH v12 6/6] docs: mm: numaperf.rst Add brief description for access class 1.

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Date: 2020-09-30 14:11:16
Also in: linux-acpi, linux-api, linux-mm, lkml
Subsystem: documentation, memory management - misc, the rest · Maintainers: Jonathan Corbet, Andrew Morton, David Hildenbrand, Linus Torvalds

Try to make minimal changes to the document which already describes
access class 0 in a generic fashion (including IO initiatiors that
are not CPUs).

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 Documentation/admin-guide/mm/numaperf.rst | 8 ++++++++
 1 file changed, 8 insertions(+)
diff --git a/Documentation/admin-guide/mm/numaperf.rst b/Documentation/admin-guide/mm/numaperf.rst
index 4d69ef1de830..86f2a3c4b638 100644
--- a/Documentation/admin-guide/mm/numaperf.rst
+++ b/Documentation/admin-guide/mm/numaperf.rst
@@ -56,6 +56,11 @@ nodes' access characteristics share the same performance relative to other
 linked initiator nodes. Each target within an initiator's access class,
 though, do not necessarily perform the same as each other.
 
+The access class "1" is used to allow differentiation between initiators
+that are CPUs and hence suitable for generic task scheduling, and
+IO initiators such as GPUs and NICs.  Unlike access class 0, only
+nodes containing CPUs are considered.
+
 ================
 NUMA Performance
 ================
@@ -88,6 +93,9 @@ The latency attributes are provided in nanoseconds.
 The values reported here correspond to the rated latency and bandwidth
 for the platform.
 
+Access class 1 takes the same form but only includes values for CPU to
+memory activity.
+
 ==========
 NUMA Cache
 ==========
-- 
2.19.1


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