On 2020/9/29 3:05, Rob Herring wrote:

On Mon, Sep 28, 2020 at 11:13:05PM +0800, Zhen Lei wrote:

quoted

Split the devicetree bindings of each Hisilicon controller from
hisilicon.txt into a separate file, the file name is the compatible name
attach the .txt file name extension.

All Hi6220 dedicated controllers are grouped into subdirectory "hi3620".
All HiPxx  dedicated controllers are grouped into subdirectory "hipxx"

Signed-off-by: Zhen Lei <redacted>
---
 .../arm/hisilicon/controller/hisilicon,cpuctrl.txt |   8 +
 .../hisilicon/controller/hisilicon,dsa-subctrl.txt |  15 ++
 .../controller/hisilicon,hi3798cv200-perictrl.txt  |  21 ++
 .../controller/hisilicon,hi6220-aoctrl.txt         |  18 ++
 .../controller/hisilicon,hi6220-mediactrl.txt      |  18 ++
 .../controller/hisilicon,hi6220-pmctrl.txt         |  18 ++
 .../controller/hisilicon,hi6220-sramctrl.txt       |  16 ++
 .../controller/hisilicon,hi6220-sysctrl.txt        |  19 ++
 .../controller/hisilicon,hip01-sysctrl.txt         |  19 ++
 .../controller/hisilicon,hip04-bootwrapper.txt     |   9 +
 .../controller/hisilicon,hip04-fabric.txt          |   5 +
 .../controller/hisilicon,pcie-sas-subctrl.txt      |  15 ++
 .../arm/hisilicon/controller/hisilicon,pctrl.txt   |  13 +
 .../controller/hisilicon,peri-subctrl.txt          |  16 ++
 .../arm/hisilicon/controller/hisilicon,sysctrl.txt |  25 ++
 .../bindings/arm/hisilicon/hisilicon.txt           | 262 ---------------------
 16 files changed, 235 insertions(+), 262 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sramctrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,peri-subctrl.txt
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
new file mode 100644
index 000000000000000..ceffac537671668
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt

@@ -0,0 +1,8 @@
+Hisilicon CPU controller
+
+Required properties:
+- compatible : "hisilicon,cpuctrl"
+- reg : Register address and size
+
+The clock registers and power registers of secondary cores are defined
+in CPU controller, especially in HIX5HD2 SoC.

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.txt
new file mode 100644
index 000000000000000..4d1c6abf03f6f97
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.txt

@@ -0,0 +1,15 @@
+Hisilicon HiP05/HiP06 DSA sub system controller
+
+Required properties:
+- compatible : "hisilicon,dsa-subctrl", "syscon";

This and others with only 'reg' can just be moved to syscon.yaml.

OK, I will do it.

quoted

+- reg : Register address and size
+
+The DSA sub system controller is shared by peripheral controllers in
+HiP05 or HiP06 Soc to implement some basic configurations.
+
+Example:
+	/* for HiP05 dsa sub system */
+	pcie_sas: system_controller@a0000000 {
+		compatible = "hisilicon,dsa-subctrl", "syscon";
+		reg = <0xa0000000 0x10000>;
+	};

...

.

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