Re: [PATCH v2 1/3] pinctrl: aspeed: Format pinconf debug consistent with pinmux
From: Joel Stanley <joel@jms.id.au>
Date: 2020-09-10 03:11:58
Also in:
linux-aspeed, linux-gpio, lkml, openbmc
On Thu, 10 Sep 2020 at 02:57, Andrew Jeffery [off-list ref] wrote:
When displaying which pinconf register and field is being touched, format the field mask so that it's consistent with the way the pinmux portion formats the mask. Signed-off-by: Andrew Jeffery <redacted> --- In v2: Format val with %X as suggested by Joel
Reviewed-by: Joel Stanley <joel@jms.id.au>
quoted hunk ↗ jump to hunk
--- drivers/pinctrl/aspeed/pinctrl-aspeed.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c index 53f3f8aec695..2e0260c1a57c 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c@@ -539,9 +539,9 @@ int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset, if (rc < 0) return rc; - pr_debug("%s: Set SCU%02X[%lu]=%d for param %d(=%d) on pin %d\n", - __func__, pconf->reg, __ffs(pconf->mask), - pmap->val, param, arg, offset); + pr_debug("%s: Set SCU%02X[0x%08X]=0x%X for param %d(=%d) on pin %d\n", + __func__, pconf->reg, pconf->mask, + val, param, arg, offset); } return 0; --2.25.1
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