From: Richard Gong <redacted>
Add the device tree files for Intel Diamond Mesa SoC
Signed-off-by: Richard Gong <redacted>
---
v2: use socfpga_agilex.dtsi rather than socfpga_diamondmesa.dtsi
---
arch/arm64/Kconfig.platforms | 5 ++
arch/arm64/boot/dts/intel/Makefile | 1 +
arch/arm64/boot/dts/intel/socfpga_diamondmesa.dts | 62 +++++++++++++++++++++++
3 files changed, 68 insertions(+)
create mode 100644 arch/arm64/boot/dts/intel/socfpga_diamondmesa.dts
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index d235b27..ffae871 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -13,6 +13,11 @@ config ARCH_AGILEX
help
This enables support for Intel's Agilex SoCFPGA Family.
+config ARCH_DIAMONDMESA
+ bool "Intel's Diamond Mesa SoCFPGA Family"
+ help
+ This enables support for Intel's Diamond Mesa SoCFPGA Family.
+
config ARCH_SUNXI
bool "Allwinner sunxi 64-bit SoC Family"
select ARCH_HAS_RESET_CONTROLLER
diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
index 296ecee..f725c60 100644
--- a/arch/arm64/boot/dts/intel/Makefile
+++ b/arch/arm64/boot/dts/intel/Makefile
@@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
dtb-$(CONFIG_ARCH_AGILEX) += socfpga_agilex_socdk.dtb \
socfpga_agilex_socdk_nand.dtb
+dtb-$(CONFIG_ARCH_DIAMONDMESA) += socfpga_diamondmesa.dtb
dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb
diff --git a/arch/arm64/boot/dts/intel/socfpga_diamondmesa.dts b/arch/arm64/boot/dts/intel/socfpga_diamondmesa.dts
new file mode 100644
index 00000000..eb1af5b
--- /dev/null
+++ b/arch/arm64/boot/dts/intel/socfpga_diamondmesa.dts
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Intel Corporation
+ */
+#include "socfpga_agilex.dtsi"
+
+/ {
+ model = "SoCFPGA Diamond Mesa Simics";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ bootargs = "earlycon";
+ stdout-path = "serial0:4800n8";
+ };
+
+ memory {
+ device_type = "memory";
+ /* We expect the bootloader to fill in the reg */
+ reg = <0 0 0 0x4000000>;
+ };
+
+ soc {
+ clocks {
+ osc1 {
+ clock-frequency = <100000000>;
+ };
+
+ uart_clk: uart_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <76800>;
+ };
+
+ mmc_clk: mmc_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ };
+ };
+ };
+};
+
+&uart0 {
+ clocks = <&uart_clk>;
+ status = "okay";
+};
+
+&mmc {
+ clocks = <&mmc_clk>, <&mmc_clk>;
+ cap-sd-highspeed;
+ broken-cd;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&watchdog0 {
+ clocks = <&osc1>;
+ status = "okay";
+};--
2.7.4
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