Re: [PATCH v7 04/10] clk: actions: Add MMC clock-register reset bits
From: Manivannan Sadhasivam <hidden>
Date: 2020-08-28 11:54:51
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On 0719, Amit Singh Tomar wrote:
This commit adds reset bits needed for MMC clock registers present on Actions S700 SoC. Reviewed-by: Manivannan Sadhasivam <redacted> Signed-off-by: Amit Singh Tomar <redacted>
Stephen, can you please apply this patch? I'll queue the dts bits for v5.10. Andreas: Let me know if you want to do the PR! These patches are waiting to be queued for a while... Thanks, Mani
quoted hunk ↗ jump to hunk
--- Changes since v6: * No change. Changes since v5: * Added Mani's Reviewed-by: tag. Changes from v4: * Reordered it from 03/10 to 04/10. Changes from v3: * NO change. Changes from v2: * No change. Changes from v1: * No change. Changes from RFC: * No change. --- drivers/clk/actions/owl-s700.c | 3 +++ 1 file changed, 3 insertions(+)diff --git a/drivers/clk/actions/owl-s700.c b/drivers/clk/actions/owl-s700.c index a2f34d13fb54..cd60eca7727d 100644 --- a/drivers/clk/actions/owl-s700.c +++ b/drivers/clk/actions/owl-s700.c@@ -577,6 +577,9 @@ static const struct owl_reset_map s700_resets[] = { [RESET_DSI] = { CMU_DEVRST0, BIT(2) }, [RESET_CSI] = { CMU_DEVRST0, BIT(13) }, [RESET_SI] = { CMU_DEVRST0, BIT(14) }, + [RESET_SD0] = { CMU_DEVRST0, BIT(22) }, + [RESET_SD1] = { CMU_DEVRST0, BIT(23) }, + [RESET_SD2] = { CMU_DEVRST0, BIT(24) }, [RESET_I2C0] = { CMU_DEVRST1, BIT(0) }, [RESET_I2C1] = { CMU_DEVRST1, BIT(1) }, [RESET_I2C2] = { CMU_DEVRST1, BIT(2) },-- 2.7.4
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