Re: [PATCH] ARM: aspeed: g5: Do not set sirq polarity
From: Jeremy Kerr <jk@ozlabs.org>
Date: 2020-08-27 06:27:12
Also in:
linux-aspeed, lkml, stable
Hi Joel,
A feature was added to the aspeed vuart driver to configure the vuart
interrupt (sirq) polarity according to the LPC/eSPI strapping register.
Systems that depend on a active low behaviour (sirq_polarity set to 0)
such as OpenPower boxes also use LPC, so this relationship does not
hold.
The property was added for a Tyan S7106 system which is not supported
in the kernel tree. Should this or other systems wish to use this
feature of the driver they should add it to the machine specific device
tree.
Fixes: c791fc76bc72 ("arm: dts: aspeed: Add vuart aspeed,sirq-polarity-sense...")
Cc: stable@vger.kernel.org
Signed-off-by: Joel Stanley <joel@jms.id.au>LGTM. I've tested this on the s2600st, which is strapped for eSPI. All good there too, as expected. Tested-by: Jeremy Kerr <jk@ozlabs.org> and/or: Reviewed-by: Jeremy Kerr <jk@ozlabs.org> Cheers, Jeremy _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel