Re: [PATCH v2 05/18] clk: at91: sam9x60-pll: check fcore against ranges
From: Stephen Boyd <sboyd@kernel.org>
Date: 2020-07-24 09:21:02
Also in:
linux-clk, lkml
Quoting Claudiu Beznea (2020-07-22 00:38:13)
According to datasheet the range of 600-1200MHz is for the
frequency generated by the fractional part of the PLL (namely
Fcorepllck according to datasheet). With this in mind the output
range of the PLL itself (fractional + div), taking into account
that the divider is 8 bits wide, is 600/256-1200Hz=2.3-1200MHz.
Fixes: a436c2a447e59 ("clk: at91: add sam9x60 PLL driver")
Signed-off-by: Claudiu Beznea <redacted>
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