Re: [PATCH 6/8] arm64: dts: renesas: Initial r8a774e1 SoC device tree
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2020-07-13 12:24:59
Also in:
linux-devicetree, linux-mmc, linux-renesas-soc, linux-serial, lkml
Hi Prabhakar, On Wed, Jul 8, 2020 at 7:49 PM Lad Prabhakar [off-list ref] wrote:
From: Marian-Cristian Rotariu <redacted> Basic support for the RZ/G2H SoC. Signed-off-by: Marian-Cristian Rotariu <redacted> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Thanks for your patch!
quoted hunk ↗ jump to hunk
--- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
+ avb: ethernet@e6800000 {
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;According to Rev. 1.00 of the Hardware User's Manual, RZ/G2H does not have the Stream Buffer for EtherAVB-IF, so the second register block should be dropped.
+ #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + /* placeholder */ + };
+ gic: interrupt-controller@f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xf1010000 0 0x1000>,
+ <0x0 0xf1020000 0 0x20000>,
+ <0x0 0xf1040000 0 0x20000>,
+ <0x0 0xf1060000 0 0x20000>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
Like Marc already pointed out, GIC_CPU_MASK_SIMPLE(8).
With the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Will queue in renesas-devel for v5.9, after fixing the above.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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