Re: [PATCHv3 7/7] drm/msm/a6xx: Add support for using system cache(LLC)

On Fri, Jul 03, 2020 at 08:23:07PM +0530, Sai Prakash Ranjan wrote:

On 2020-07-03 19:07, Will Deacon wrote:

quoted

On Mon, Jun 29, 2020 at 09:22:50PM +0530, Sai Prakash Ranjan wrote:

quoted

diff --git a/drivers/gpu/drm/msm/msm_iommu.c

b/drivers/gpu/drm/msm/msm_iommu.c
index f455c597f76d..bd1d58229cc2 100644

--- a/drivers/gpu/drm/msm/msm_iommu.c
+++ b/drivers/gpu/drm/msm/msm_iommu.c

@@ -218,6 +218,9 @@ static int msm_iommu_map(struct msm_mmu *mmu,

uint64_t iova,
 		iova |= GENMASK_ULL(63, 49);


+	if (mmu->features & MMU_FEATURE_USE_SYSTEM_CACHE)
+		prot |= IOMMU_SYS_CACHE_ONLY;

Given that I think this is the only user of IOMMU_SYS_CACHE_ONLY, then
it
looks like it should actually be a property on the domain because we
never
need to configure it on a per-mapping basis within a domain, and
therefore
it shouldn't be exposed by the IOMMU API as a prot flag.

Do you agree?

GPU being the only user is for now, but there are other clients which can
use this.
Plus how do we set the memory attributes if we do not expose this as prot
flag?

I just don't understand the need for it to be per-map operation. Put another
way, if we extended the domain attribute to apply to cacheable mappings
on the domain and not just the table walk, what would break?

Will

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