Re: [PATCH] clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2
From: Jerome Brunet <jbrunet@baylibre.com>
Date: 2020-06-25 06:30:51
Also in:
linux-amlogic, linux-clk, lkml
From: Jerome Brunet <jbrunet@baylibre.com>
Date: 2020-06-25 06:30:51
Also in:
linux-amlogic, linux-clk, lkml
On Sat 20 Jun 2020 at 18:14, Martin Blumenstingl [off-list ref] wrote:
Drop CLK_IS_CRITICAL from fclk_div2. This was added because we didn't know the relation between this clock and RGMII Ethernet. It turns out that fclk_div2 is used as "timing adjustment clock" to generate the RX delay on the MAC side - which was enabled by u-boot on Odriod-C1. When using the RX delay on the PHY side or not using a RX delay at all then this clock can be disabled. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Applied. Thx _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel