On Mon, Jun 01, 2020 at 10:24:00AM +0300, Adrian Hunter wrote:

On 30/05/20 3:24 pm, Leo Yan wrote:

quoted

From: Tan Xiaojun <redacted>

This patch is to add four options to synthesize events which are
described as below:

 'f': synthesize first level cache events
 'm': synthesize last level cache events
 't': synthesize TLB events
 'a': synthesize remote access events

This four options will be used by ARM SPE as their first consumer.

Signed-off-by: Tan Xiaojun <redacted>
Signed-off-by: James Clark <redacted>
Signed-off-by: Leo Yan <redacted>
Tested-by: James Clark <redacted>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

Thanks a lot for reviewing, Adrian.

Leo

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