Re: [PATCH v2 19/19] arm64: mte: Add Memory Tagging Extension documentation
From: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-03-11 22:18:01
Also in:
linux-arch, linux-mm
On 2/26/20 10:05 AM, Catalin Marinas wrote:
quoted hunk ↗ jump to hunk
+ /* + * From include/uapi/linux/prctl.h + */ + #define PR_SET_TAGGED_ADDR_CTRL 55 + #define PR_GET_TAGGED_ADDR_CTRL 56 + # define PR_TAGGED_ADDR_ENABLE (1UL << 0) + # define PR_MTE_TCF_SHIFT 1 + # define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT) + # define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT) + # define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT) + # define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT) + # define PR_MTE_TAG_SHIFT 3 + # define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
Is there a reason not to include TCMA into the set of bits that userland can control with this prcrl? I know that ordinarily TCR_ELx requires expensive syncing, but for this particular field there is a note about "software may change this control bit on a context switch". Which I take to mean that the usual TLB-related syncing may be omitted. r~ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel