Re: [PATCH 1/2] dt-bindings: edac: Add DT bindings for Kryo EDAC

Hi Sai,

On 24/01/2020 14:21, Sai Prakash Ranjan wrote:

On 2020-01-16 00:18, James Morse wrote:

quoted

On 05/12/2019 09:53, Sai Prakash Ranjan wrote:

quoted

This adds DT bindings for Kryo EDAC implemented with RAS
extensions on KRYO{3,4}XX CPU cores for reporting of cache
errors.

quoted

quoted

diff --git a/Documentation/devicetree/bindings/edac/qcom-kryo-edac.yaml

b/Documentation/devicetree/bindings/edac/qcom-kryo-edac.yaml
new file mode 100644
index 000000000000..1a39429a73b4

--- /dev/null
+++ b/Documentation/devicetree/bindings/edac/qcom-kryo-edac.yaml

quoted

There is also an MMIO interface which needs a base address, along with
the index and
ranges. (which may be different). The same component may use both the
system register and the MMIO interface.

I have some doubts here, Where do I get this info? Will this be implementation specific?

It will be implementation specific. The ACPI spec folk have gathered some of the range of
ways people are putting this together. We should take that into account with the binding,
otherwise we end up with a 'v1' and 'v2' of the binding and have to support both.


There is a 'Beta 2' of that ACPI document. It should appear on the website at some point.
Qualcomm should have this somewhere, its called 'DEN0085_RAS_ACPI_1.0_RELEASE_BETA2.pdf.


Thanks,

James

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